Configration............problem..............

A

arvind

Guest
I am using xc2s30 -5 pq144 fpga when i am programming through
jatag(slave serial using ISE4.2i) this device programmed successfully
but when i am trying to configure using prom xc18v02 pc44 the FPGA is
not getting configured and the done is not getting high the cclk is
coming from FPGA continues and the data from prom is comes power-on we
seen on oscilloscope. the init and programme pin high and the cclk is
4mhz coming continues.
In prom xc18v series data sheet the recommended prom for xc2s30 is
xc18v512 so i want to know can i use this xc18v02 for xc2s30 or i have
to use xc18v512 only.
I used xc18v02 prom to configure xc2s100 and xc2s200 it is working
fine so what is the difference in xc2s30.
xc18v02 is recommended for xc2s200 but it is configuring xc2s100 fpga
so it should configure xc2s30 also.

Thanks.
 
This is a warning that tells you that the XST / PAR has used the last
constraint set in the UCF file.

Xilinx allows multiple constrainst to be set, but if more than one is used
the UCF file will have priority.

I think it goes something like EDIF file constraint to NCF file to UCF file
etc.

With UCF file setting the priority. i.e. the user can override what an IP
provider has stated in the EDIF or NCF for a particular place and route run
in the UCF.

Good Luck



--
ExpressIP LTD

FPGA Board with free IP cores

EMAIL: info@expressip.co.uk
WEB : www.ExpressIP.co.uk


This email is communicated in confidence.
It is intended for the recipient only, and may not be disclosed further
without the express consent of the sender.
If you receive this email in error - please notify the sender immediately,
return the original message, and destroy any copies.

Viruses - ExpressIP has taken every reasonable precaution to ensure that
this message is virus-free.
However, we cannot accept liability for any damage sustained as a result of
software viruses.
You are advised to scan all messages before opening.
"arvind" <arvindstomar@india.com> wrote in message
news:56147fd4.0406010122.293a7bbb@posting.google.com...
I am using xc2s30 -5 pq144 fpga when i am programming through
jatag(slave serial using ISE4.2i) this device programmed successfully
but when i am trying to configure using prom xc18v02 pc44 the FPGA is
not getting configured and the done is not getting high the cclk is
coming from FPGA continues and the data from prom is comes power-on we
seen on oscilloscope. the init and programme pin high and the cclk is
4mhz coming continues.
In prom xc18v series data sheet the recommended prom for xc2s30 is
xc18v512 so i want to know can i use this xc18v02 for xc2s30 or i have
to use xc18v512 only.
I used xc18v02 prom to configure xc2s100 and xc2s200 it is working
fine so what is the difference in xc2s30.
xc18v02 is recommended for xc2s200 but it is configuring xc2s100 fpga
so it should configure xc2s30 also.

Thanks.
 

Welcome to EDABoard.com

Sponsor

Back
Top