conditional model generation

[Holger Venus]

Hi to all,



Does some body have an idea how to generate a model based on

generic control, both for the architecture part (component instantiation

and conditional generated wiring) and the entity ports!! as well?

I am trying to create a generic model with a scalable hardware (via

generate statement in the architecture part). Depending on the

generated architecture, the port declaration has to be adapted as well!!

I do not know a way to use generate statements in the entity section

directly. Could there be a trick to use a record structure in the entity

but declare the record in an external package?

Is it possible to use the generate statement in a package declaration

section? What about block statement usage in the package section?



Thank you for your help



Holger