G
Giox
Guest
Hello everybody,
I've to test a vhdl program for Xilinx Virtex2Pro. When I try to
simulate it I receive the following message:
"Component gt_swift_bw_1 is not bound" with a reference to the file
unisim_SMODEL.vhd
I compiled the unisims library provided with ISE 7.1.
Is there someone that can explain what's my error?
I searched for it on Google but no relevant info has been found. Can
this problem be related with version of Xilinx ISE?
The program has been developed using ISE 6.2, I try to simulate it with
ISE Xilinx 7.1
I've to test a vhdl program for Xilinx Virtex2Pro. When I try to
simulate it I receive the following message:
"Component gt_swift_bw_1 is not bound" with a reference to the file
unisim_SMODEL.vhd
I compiled the unisims library provided with ISE 7.1.
Is there someone that can explain what's my error?
I searched for it on Google but no relevant info has been found. Can
this problem be related with version of Xilinx ISE?
The program has been developed using ISE 6.2, I try to simulate it with
ISE Xilinx 7.1