R
Rajat Mitra
Guest
I have been in the market for a Verilog Simulator. Having worked at some
rather rigorous chip design outfits for the last 7 or so years, I was
exposed only to the industry standard VCS and NC Verilog tools on Linux and
HPUX..... I know of know other way to do IC design besides doing it with
these tools on Unix Platforms..but am open to learning how to use these
tools on Win+PC. Now on inquiring on what these tools cost, I found the
amounts to be commensurate with that of putting a down payment on a house.
So here I am looking for advice; I recently learned that Cadence and Mentor
have NC-Verilog and ModelSim Verilog available on Win PC platforms and at a
price that is somewhat affordable ( <$5K). I also found another Verilog
Compiler called Silos ( Simucad - now Silvaco )..here are my questions -
-Is ModelSim PE a compiled simulator ?? How does it compare in performance
with LE ( Unix Version ) ??
-How does NC Verilog on PC compare in feature / performance with its Unix
counterpart ??
-How does the latest version of NC-Verilog ( PC ) compare with latest
Modelsim PE ??
-Is there a Unix like paradigm for simulating a design on Win+PC ?? In Unix
I typically run simulation in Batch Mode ( using a Makefile ) and then post
process a VCD file generated by the simulator. What is the equivalent of
this on Win+PC ??
-Finally the most reasonably priced Unix Verilog simulator I found was one
offered by Silvaco ( Silos ). Does anyone have experience with this tool ??
Hoe does it compare with the big 3 ( Mentor, Cadence, Synopsys ) ?? Is
compiled or interpreted ?? etc..
I appreciate all the help,
Regards,
Rajat Mitra....
rather rigorous chip design outfits for the last 7 or so years, I was
exposed only to the industry standard VCS and NC Verilog tools on Linux and
HPUX..... I know of know other way to do IC design besides doing it with
these tools on Unix Platforms..but am open to learning how to use these
tools on Win+PC. Now on inquiring on what these tools cost, I found the
amounts to be commensurate with that of putting a down payment on a house.
So here I am looking for advice; I recently learned that Cadence and Mentor
have NC-Verilog and ModelSim Verilog available on Win PC platforms and at a
price that is somewhat affordable ( <$5K). I also found another Verilog
Compiler called Silos ( Simucad - now Silvaco )..here are my questions -
-Is ModelSim PE a compiled simulator ?? How does it compare in performance
with LE ( Unix Version ) ??
-How does NC Verilog on PC compare in feature / performance with its Unix
counterpart ??
-How does the latest version of NC-Verilog ( PC ) compare with latest
Modelsim PE ??
-Is there a Unix like paradigm for simulating a design on Win+PC ?? In Unix
I typically run simulation in Batch Mode ( using a Makefile ) and then post
process a VCD file generated by the simulator. What is the equivalent of
this on Win+PC ??
-Finally the most reasonably priced Unix Verilog simulator I found was one
offered by Silvaco ( Silos ). Does anyone have experience with this tool ??
Hoe does it compare with the big 3 ( Mentor, Cadence, Synopsys ) ?? Is
compiled or interpreted ?? etc..
I appreciate all the help,
Regards,
Rajat Mitra....