A
Alexander Kane
Guest
I am struggling to find a solution to my problem:
I would like to get a (very) rough idea of the relative levels of
power consumption used by equivelent devices from Altera's Cyclone III
and IV ranges and Lattice's ECP3 and XP2 ranges. Implementing the
same design on each of those devices (say the 16-17k logic element
size) how big a difference in power consumption will there be between
each of those FPGA ranges? I'm not looking for you to necessarily
give me the answer but maybe point me in the right direction.
I would like to get a (very) rough idea of the relative levels of
power consumption used by equivelent devices from Altera's Cyclone III
and IV ranges and Lattice's ECP3 and XP2 ranges. Implementing the
same design on each of those devices (say the 16-17k logic element
size) how big a difference in power consumption will there be between
each of those FPGA ranges? I'm not looking for you to necessarily
give me the answer but maybe point me in the right direction.