Comparing Quality of Results of FPGA CAD Tools

J

John Smith

Guest
I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.

I worked on 15 big designs, already coded, targeting both virtexII
and StratixII. All the designs were in verilog and I used
Xilinx XST and Altera QNS at the front end. I spent lot
of time to see the quality of results from the synthesis
tools. For 11 designs, QNS won both in area and final
fmax. XST was not even comparable in the quality of results.
QNS compiler seems to do very good job compared to
XST. Also, QNS does very good job in removing redundant logic
and registers. So in my experience, QNS is a much better logic synthesis
tools compared to XST.

At the end of my sabbatical, I was able to use the latest (beta) synplify PRO.
I did not have much time, but I did run these 15 designs targeting
StartixII, as I was interested in comparing with the best known results.
Synplify Pro did excellent job in implementing operators,
and it found optimal five, six and seven inputs functions
on the critical paths.

For my ten designs, Pro results were superior in terms of area and fmax
compared to QNS. Synplify Pro has a very fast run time.
For the remaining five designs, QNS seems to remove
lot of redundant logic and registers, which pro did not remove.
I did not have time to analyze these designs. QNS area was much
smaller for these five designs.

I am back to my school and I use free XST and QNS tools.
I am going to do more research using these tools. I would like
to share my experience in this group. I am also interested
in listening the quality of results from various tools.

Prof. John Smith
a2003zz@yahoo.com
 
"John Smith" <a2003zz@yahoo.com> wrote in message
news:b97fd375.0408051432.6baf5760@posting.google.com...
I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.

I worked on 15 big designs, already coded, targeting both virtexII
and StratixII. All the designs were in verilog and I used
Xilinx XST and Altera QNS at the front end. I spent lot
of time to see the quality of results from the synthesis
tools. For 11 designs, QNS won both in area and final
fmax. XST was not even comparable in the quality of results.
QNS compiler seems to do very good job compared to
XST. Also, QNS does very good job in removing redundant logic
and registers. So in my experience, QNS is a much better logic synthesis
tools compared to XST.
Click to expand...
I'm not sure what this is telling us. It looks like you compared the
fmax of some designs in VirtexII (quite old technology) and
StratixII (quite new/future technology), and observed that the StratixII
implementation was faster.

From this you deduced that the Altera synthesis was better.

What am I missing here?
 
On 5 Aug 2004 15:32:23 -0700, a2003zz@yahoo.com (John Smith) wrote:

I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.
Click to expand...
Let's see:
- name is John Smith
- full professor at US school, but no mention of school name
- yahoo e-mail address
- Having attended engineering school, I realize that English is
not a top priority for students or faculty. Even so, the phrase "I
would like to shed my experiences" is not exactly
confidence-inspiring.

I suppose this could be legit, but the ol' bogosity meter is sitting
near full scale. For starters, could you give us the university and
department names?

Thanks,
Bob Perlman
Cambrian Design Works
 
Pete Fraser wrote:
"John Smith" <a2003zz@yahoo.com> wrote in message
news:b97fd375.0408051432.6baf5760@posting.google.com...

I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Click to expand...
[snip]

From this you deduced that the Altera synthesis was better.

What am I missing here?
Click to expand...
My B.S. detectors are hitting full scale deflection on this one!

"John Smith"? Pseudo-anonymous name, anonymous email, simple
grammatical errors, explicitly saying "full professor", not identifying
which school... nah....

But why?
 
John Williams wrote:
Pete Fraser wrote:

"John Smith" <a2003zz@yahoo.com> wrote in message
news:b97fd375.0408051432.6baf5760@posting.google.com...

I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for


[snip]


From this you deduced that the Altera synthesis was better.

What am I missing here?


My B.S. detectors are hitting full scale deflection on this one!

"John Smith"? Pseudo-anonymous name, anonymous email, simple
grammatical errors, explicitly saying "full professor", not identifying
which school... nah....

But why?
Click to expand...
Perhaps the author is the Prof. John Smith that google turns up here :)
http://www.a2zcolleges.com/adm/samplereco.html
-jg
 
From his IP address he's one
CustName: J VASUDEVAMURTHY

I found an email address on Google

jagadeesh.vasudevamurthy@Xilinx.COM

How very strange!

"Bob Perlman" <bobsrefusebin@hotmail.com> wrote in message
news:eog5h0hguncjmoiu7b3cq6gu6beihebhl3@4ax.com...
On 5 Aug 2004 15:32:23 -0700, a2003zz@yahoo.com (John Smith) wrote:

I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.


Let's see:
- name is John Smith
- full professor at US school, but no mention of school name
- yahoo e-mail address
- Having attended engineering school, I realize that English is
not a top priority for students or faculty. Even so, the phrase "I
would like to shed my experiences" is not exactly
confidence-inspiring.

I suppose this could be legit, but the ol' bogosity meter is sitting
near full scale. For starters, could you give us the university and
department names?

Thanks,
Bob Perlman
Cambrian Design Works
Click to expand...
 
Pete Fraser wrote:
"John Smith" <a2003zz@yahoo.com> wrote in message
news:b97fd375.0408051432.6baf5760@posting.google.com...
I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.

I worked on 15 big designs, already coded, targeting both virtexII
and StratixII. All the designs were in verilog and I used
Xilinx XST and Altera QNS at the front end. I spent lot
of time to see the quality of results from the synthesis
tools. For 11 designs, QNS won both in area and final
fmax. XST was not even comparable in the quality of results.
QNS compiler seems to do very good job compared to
XST. Also, QNS does very good job in removing redundant logic
and registers. So in my experience, QNS is a much better logic synthesis
tools compared to XST.

I'm not sure what this is telling us. It looks like you compared the
fmax of some designs in VirtexII (quite old technology) and
StratixII (quite new/future technology), and observed that the StratixII
implementation was faster.

From this you deduced that the Altera synthesis was better.

What am I missing here?
Click to expand...
How exactly is Virtex II considered "old" technology. Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
"rickman" <spamgoeshere4@yahoo.com> wrote in message
news:41133277.590BD487@yahoo.com...

How exactly is Virtex II considered "old" technology. Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.

I guess "old" was the wrong term.
Click to expand...
I was just pointing out that it might be more appropriate to compare
StratixII with Virtex4.
 
Pete,

You are correct. 4VLX25 ES samples are available, too.

Austin

Pete Fraser wrote:
"rickman" <spamgoeshere4@yahoo.com> wrote in message
news:41133277.590BD487@yahoo.com...


How exactly is Virtex II considered "old" technology. Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.


I guess "old" was the wrong term.
I was just pointing out that it might be more appropriate to compare
StratixII with Virtex4.
Click to expand...
 
RP:

There is no employee at Xilinx by that name.

I think the BS meter just pegged and broke!

<ignore>

Austin

Rotund Phase wrote:
From his IP address he's one
CustName: J VASUDEVAMURTHY

I found an email address on Google

jagadeesh.vasudevamurthy@Xilinx.COM

How very strange!

"Bob Perlman" <bobsrefusebin@hotmail.com> wrote in message
news:eog5h0hguncjmoiu7b3cq6gu6beihebhl3@4ax.com...

On 5 Aug 2004 15:32:23 -0700, a2003zz@yahoo.com (John Smith) wrote:


I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.


Let's see:
- name is John Smith
- full professor at US school, but no mention of school name
- yahoo e-mail address
- Having attended engineering school, I realize that English is
not a top priority for students or faculty. Even so, the phrase "I
would like to shed my experiences" is not exactly
confidence-inspiring.

I suppose this could be legit, but the ol' bogosity meter is sitting
near full scale. For starters, could you give us the university and
department names?

Thanks,
Bob Perlman
Cambrian Design Works
Click to expand...
 
Pete Fraser wrote:
"rickman" <spamgoeshere4@yahoo.com> wrote in message
news:41133277.590BD487@yahoo.com...


How exactly is Virtex II considered "old" technology. Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.

I guess "old" was the wrong term.
I was just pointing out that it might be more appropriate to compare
StratixII with Virtex4.
Click to expand...
Is that possible? Is Virtex4 supported by the current tools?


--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
Rick,

If you subscribed to the early access program, you would be using tools
to develop your Virtex 4 design.

Since that is a select few (one might even say insignificant number
compared to the total number of users), I would not expect anyone out
there to know about it, unless they were a customer who had expressed an
interest in being an early adopter of the latest technology (also
because if someone was part of the program, they sign the agreement not
to divulge).

Once the product is announced, and all software enabled, the good news
is that there were many who had gone through it before you did, and
helped hammer out all of the bugs.

We greatly appreciate those who volunteer to be early access customers,
and we hope that they feel that we have done everything we can to have
supported them, as this is definitely something that benefits everyone.

Austin

rickman wrote:
Pete Fraser wrote:

"rickman" <spamgoeshere4@yahoo.com> wrote in message
news:41133277.590BD487@yahoo.com...


How exactly is Virtex II considered "old" technology. Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.


I guess "old" was the wrong term.
I was just pointing out that it might be more appropriate to compare
StratixII with Virtex4.


Is that possible? Is Virtex4 supported by the current tools?
Click to expand...
 
From: rickman <spamgoeshere4@yahoo.com

Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.
Click to expand...
Not true. The Virtex-IIPro fabric is almost identical with Virtex-II, with
PowerPC and Multi-gigabit transceivers added to it. But the more advanced
processing makes V-IIPro both faster and -lo and behold- even cheaper than
the same logic in Virtex-II.
So you can ignore ("throw away") the PPC and the MGTs, and V-IIPro is still
less expensive than Virtex-II. If you use the PPC and/or the MGT, it is just
that much more of a bargain.
Just one of the benefits of Moore's Law and aggressive process innovation...

Peter Alfke
 
"Austin Lesea" <austin@xilinx.com> wrote in message
news:cf0di4$gju5@cliff.xsj.xilinx.com...
RP:

There is no employee at Xilinx by that name.
Click to expand...

Try 1995, perhaps - it could have been faked but it's on the net.


I think the BS meter just pegged and broke!

ignore

Austin

Rotund Phase wrote:
From his IP address he's one
CustName: J VASUDEVAMURTHY

I found an email address on Google

jagadeesh.vasudevamurthy@Xilinx.COM

How very strange!

"Bob Perlman" <bobsrefusebin@hotmail.com> wrote in message
news:eog5h0hguncjmoiu7b3cq6gu6beihebhl3@4ax.com...

On 5 Aug 2004 15:32:23 -0700, a2003zz@yahoo.com (John Smith) wrote:


I am a full professor in a US school and do research
in the area of synthesis. I also teach logic design for
Undergraduate students. I had a six month sabbatical recently
in a design house and I used many FPGA cad tools. I would
like to shed my experiences in this group.


Let's see:
- name is John Smith
- full professor at US school, but no mention of school name
- yahoo e-mail address
- Having attended engineering school, I realize that English is
not a top priority for students or faculty. Even so, the phrase "I
would like to shed my experiences" is not exactly
confidence-inspiring.

I suppose this could be legit, but the ol' bogosity meter is sitting
near full scale. For starters, could you give us the university and
department names?

Thanks,
Bob Perlman
Cambrian Design Works
Click to expand...
 
Ok, so I think the answer is "in general, the tools do not yet support
the Virtex 4 parts". I understand that you have a special program for
"early access". But the question was in the context of doing a
comparison. Unless the OP was one of the "early adopters" he would not
be able to do the comparison.


Austin Lesea wrote:
Rick,

If you subscribed to the early access program, you would be using tools
to develop your Virtex 4 design.

Since that is a select few (one might even say insignificant number
compared to the total number of users), I would not expect anyone out
there to know about it, unless they were a customer who had expressed an
interest in being an early adopter of the latest technology (also
because if someone was part of the program, they sign the agreement not
to divulge).

Once the product is announced, and all software enabled, the good news
is that there were many who had gone through it before you did, and
helped hammer out all of the bugs.

We greatly appreciate those who volunteer to be early access customers,
and we hope that they feel that we have done everything we can to have
supported them, as this is definitely something that benefits everyone.

Austin

rickman wrote:
Pete Fraser wrote:

"rickman" <spamgoeshere4@yahoo.com> wrote in message
news:41133277.590BD487@yahoo.com...


How exactly is Virtex II considered "old" technology. Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.


I guess "old" was the wrong term.
I was just pointing out that it might be more appropriate to compare
StratixII with Virtex4.


Is that possible? Is Virtex4 supported by the current tools?
Click to expand...
--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
Peter Alfke wrote:
From: rickman <spamgoeshere4@yahoo.com

Virtex 2 is the
newest, fastest parts that Xilinx has. Virtex2pro may be a bit
newer/faster, but they are not the same generic parts, they all include
Power PC CPUs internally driving up the cost considerably.

Not true. The Virtex-IIPro fabric is almost identical with Virtex-II, with
PowerPC and Multi-gigabit transceivers added to it. But the more advanced
processing makes V-IIPro both faster and -lo and behold- even cheaper than
the same logic in Virtex-II.
So you can ignore ("throw away") the PPC and the MGTs, and V-IIPro is still
less expensive than Virtex-II. If you use the PPC and/or the MGT, it is just
that much more of a bargain.
Just one of the benefits of Moore's Law and aggressive process innovation...
Click to expand...
Yes, you can ignore and throw away the PPC. But you can't get the part
for the same price as not having the PPC. So comparing the V2P would
not be very apples and oranges. Of course there are lots of ways a V2
to StradixII is not apples to oranges, but in terms of the current parts
designed for speed and in the same price range, I think this is the best
comparison until V4 is actually out (or at least in the current release
of the software).

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
John Smith wrote:

I worked on 15 big designs, already coded, targeting both virtexII
and StratixII. All the designs were in verilog and I used
Xilinx XST and Altera QNS at the front end. I spent lot
of time to see the quality of results from the synthesis
tools. For 11 designs, QNS won both in area and final
fmax. XST was not even comparable in the quality of results.
QNS compiler seems to do very good job compared to
XST. Also, QNS does very good job in removing redundant logic
and registers. So in my experience, QNS is a much better logic synthesis
tools compared to XST.
Click to expand...
It would have been nice to detail precisely all versions of the
development tools and all device characteristics that you used to be
sure that you don't compare an old XST w/ an old technology w/ a small
FPGA to a new QNS w/ a new technology w/ a big FPGA ;-) For a professor,
you're quite vague on the conditions of your experiments.

Eric
 
From: rickman <spamgoeshere4@yahoo.com

Yes, you can ignore and throw away the PPC. But you can't get the part
for the same price as not having the PPC.
Click to expand...
This argumentation is getting a bit weird. So we offer higher performance at
a lower price ( in Virtex-IIPro), but rickman does not want to use them as a
benchmark, because they wouldhave been even cheaper without the PPC and MGT.

Yes, and even cheaper without all the multipliers, and without the BlockRAM
and the DCM, not to mention all the 50 different I/O options. And half the
routing is never used, and who needs LUT-RAM and SRL16s ?
Where should we stop in stripping things out to make you happy ?

Peter Alfke
 
Peter Alfke wrote:
From: rickman <spamgoeshere4@yahoo.com

Yes, you can ignore and throw away the PPC. But you can't get the part
for the same price as not having the PPC.

This argumentation is getting a bit weird. So we offer higher performance at
a lower price ( in Virtex-IIPro), but rickman does not want to use them as a
benchmark, because they wouldhave been even cheaper without the PPC and MGT.

Yes, and even cheaper without all the multipliers, and without the BlockRAM
and the DCM, not to mention all the 50 different I/O options. And half the
routing is never used, and who needs LUT-RAM and SRL16s ?
Where should we stop in stripping things out to make you happy ?
Click to expand...
Scarcasm is always a nice way to discuss a topic.

I checked web pricing and the V2Pro is a bit cheaper than the V2. The
last time I had checked it was not. Regardless, V2 is not "quite old
technology" and it is also not the V4 which is what Pete Fraser was
proposing and I was disputing the availability for comparison. Austin
said that "special" customers have been given the software to evaluate.
So unless we get some of the "special" customers in this discussion, we
will have to use the old Xilinx technology for our comparisons.


--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
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