Comparing more than one bits?

R

Rob

Guest
Hi

I wann do a simpe comparison, to see if 6 bits of my bus have a certain
value. However, the codefragmet below does not work to my surpirse.
Anyone an idea what I am missing? must be simple, the error message says
no feasable entries for infix op: =

if ( clk = '1' and clk'event ) then
if (data_bus(31 downto 26)="100011") then
...


Thanks in advance,
R.
 
How is data_bus declared? If it is std_logic_vector, this looks good
to me. The error message is saying that it can't find a version of
'=' that uses the two operand types and produces a boolean which is
required by the IF. Did you include the libraries?
It is declared as unsigned...so in this case I cant compare bitwise I
assume. But I could cast it to std_logic_vector, couldnt I?
 
On Wed, 28 May 2008 14:40:02 +0100, Rob <Rob@yahoo.co.uk> wrote:

... if some_unsigned(31 downto 26) = "100111" then ...

How is data_bus declared? If it is std_logic_vector, this looks good
to me. The error message is saying that it can't find a version of
'=' that uses the two operand types and produces a boolean which is
required by the IF. Did you include the libraries?

It is declared as unsigned...so in this case I cant compare bitwise I
assume. But I could cast it to std_logic_vector, couldnt I?
I suspect the problem is that you're using the std_logic_arith
package rather than numeric_std.

std_logic_arith has overloads for unsigned=unsigned and also for
unsigned=signed. Consequently, the type of your "100111" is
ambiguous - although you aren't getting the right error message
for that - and the compiler should indeed choke on it. The
properly-standardised numeric_std package does not have an
unsigned=signed overload, so there's no ambiguity.

Fixes - ah, so many choices...

(1) cast to std_logic_vector as you suggest;
(2) type-qualify the constant as unsigned (NOTE the apostrophe):
if some_unsigned(31 downto 26) = unsigned'("100111") then...
(3) use numeric_std in preference to std_logic_arith;
(4) use an ordinary integer literal for the comparison:
if some_unsigned(31 downto 26) = 39 then ...
if some_unsigned(31 downto 26) = 2#100111# then ...

hth
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
On May 28, 7:52 am, Rob <R...@yahoo.co.uk> wrote:
Hi

I wann do a simpe comparison, to see if 6 bits of my bus have a certain
value. However, the codefragmet below does not work to my surpirse.
Anyone an idea what I am missing? must be simple, the error message says
no feasable entries for infix op: =

if ( clk = '1' and clk'event ) then
if (data_bus(31 downto 26)="100011") then
...

Thanks in advance,
R.
How is data_bus declared? If it is std_logic_vector, this looks good
to me. The error message is saying that it can't find a version of
'=' that uses the two operand types and produces a boolean which is
required by the IF. Did you include the libraries?

Rick
 
On May 28, 9:40 am, Rob <R...@yahoo.co.uk> wrote:
How is data_bus declared? If it is std_logic_vector, this looks good
to me. The error message is saying that it can't find a version of
'=' that uses the two operand types and produces a boolean which is
required by the IF. Did you include the libraries?

It is declared as unsigned...so in this case I cant compare bitwise I
assume. But I could cast it to std_logic_vector, couldnt I?
I didn't think that was necessary. unsigned is compatible with string
literals. No?

Rick
 
On Wed, 28 May 2008 07:19:25 -0700 (PDT), rickman <gnuarm@gmail.com>
wrote:

On May 28, 9:40 am, Rob <R...@yahoo.co.uk> wrote:
How is data_bus declared? If it is std_logic_vector, this looks good
to me. The error message is saying that it can't find a version of
'=' that uses the two operand types and produces a boolean which is
required by the IF. Did you include the libraries?

It is declared as unsigned...so in this case I cant compare bitwise I
assume. But I could cast it to std_logic_vector, couldnt I?

I didn't think that was necessary. unsigned is compatible with string
literals. No?
the REAL unsigned is...
those damned impostors from those other non-std libraries, otoh...

- Brian
 

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