K
Keith
Guest
In order to reduce the number of components, traces onboard, and overall
simplicity, I'm looking for a combined component that combines the serial to
parallel feature of the 74LS164 and the buffer/latch capabilities of the
74LS374. Right now, the current design calls for all eight
Q-parallel-outputs on the 164 to be tied directly to the D-inputs on the
374.
The data will be arriving at the 164 inputs at about 500khz, but I need to
support up to about 1 mhz. Even though the operating frequency is fairly
low for most of these components(ie components can run much faster), the
data setup/hold times need to be fairly small. The 0-state is actually a
transition from low to high across 2us(1/500khz) , and with a d-flip/flop
I've managed to extract true 0's in the neighborhood of about 550ns bit
width(absolute absolute worst case is 390, widest case is ~600). This comes
from the fact that the transition is below 1.5v(.3 * 5v) for this period of
time. I don't know how to increase this past 600-650 easily. I'm going to
use a PLL-like circuit that is constantly resync'ing, and so I'm going to
try to keep the sampling and the data at the beginning of the 2us cell. I
realize that clocking is going to be crucial here.....
I'm a novice and so I've been trying to select something that fits the
requirements, has a low pin count, low # of external components, easy to
use, etc. So far, a lot of components data setup+hold times are in the ms
range --- obviously these won't work. Cost isn't much of a concern, but
availability in low quantities via digikey, mouser, etc is important.
Thanks,
Keith
Pittsburgh
P.S. If there is a better ng/forum for this type of question, I'll happily
redirect. I didn't want to cross-post... thanks.
Remove the NO SPAM from my email address to email me directly.
simplicity, I'm looking for a combined component that combines the serial to
parallel feature of the 74LS164 and the buffer/latch capabilities of the
74LS374. Right now, the current design calls for all eight
Q-parallel-outputs on the 164 to be tied directly to the D-inputs on the
374.
The data will be arriving at the 164 inputs at about 500khz, but I need to
support up to about 1 mhz. Even though the operating frequency is fairly
low for most of these components(ie components can run much faster), the
data setup/hold times need to be fairly small. The 0-state is actually a
transition from low to high across 2us(1/500khz) , and with a d-flip/flop
I've managed to extract true 0's in the neighborhood of about 550ns bit
width(absolute absolute worst case is 390, widest case is ~600). This comes
from the fact that the transition is below 1.5v(.3 * 5v) for this period of
time. I don't know how to increase this past 600-650 easily. I'm going to
use a PLL-like circuit that is constantly resync'ing, and so I'm going to
try to keep the sampling and the data at the beginning of the 2us cell. I
realize that clocking is going to be crucial here.....
I'm a novice and so I've been trying to select something that fits the
requirements, has a low pin count, low # of external components, easy to
use, etc. So far, a lot of components data setup+hold times are in the ms
range --- obviously these won't work. Cost isn't much of a concern, but
availability in low quantities via digikey, mouser, etc is important.
Thanks,
Keith
Pittsburgh
P.S. If there is a better ng/forum for this type of question, I'll happily
redirect. I didn't want to cross-post... thanks.
Remove the NO SPAM from my email address to email me directly.