clockdivider with enable

[jo]

I need to make a vga controller but I have a problem.
The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz for
640 by 480 pixels.
but the clock input should be the real clock 48 Mhz en there's also an
enable input and by this input we can get the correct(needed)
frequency of 24 MHz.
I don't know how to do this and how this exactly works,but it has to
be done this way,maybe somebody can write a little bit code for me?
Are explain howthis thing works.
thanks a lot!!

 

I know how to divide a clock buth how does this works in combination
with the enable input?

 

[Mohammed A khader]

HI Jo,

The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz
but the clock input should be the real clock 48 Mhz en there's also
an
enable input

What are you targetting for FPGA or ASIC ?
And from where is this enable input coming(I mean relation between
enable and clk).

-- Mohammed A Khader.


jo wrote:

I need to make a vga controller but I have a problem.
The clock is 48 Mhz,so i have to divide it by two to have 24 Mhz for
640 by 480 pixels.
but the clock input should be the real clock 48 Mhz en there's also
an
enable input and by this input we can get the correct(needed)
frequency of 24 MHz.
I don't know how to do this and how this exactly works,but it has to
be done this way,maybe somebody can write a little bit code for me?
Are explain howthis thing works.
thanks a lot!!

 

i'm targetting fpga.
But I've decided to leave the enable foe now ,since nothing is coming
on the screen.
I'm gonna post it as a new topic vga controller.
Maybe you can have a quick look to see if you notice something wrong.

thanks for the help