Clock generator problem

[meghna]

Hi,
I have designed a large circuit in Spectre and using two non-overlapping
clocks for my design. Also I am using delayed clocks for reducing charge
injection noise. (In all, the clocks are- phi1, phi1d, phi2, phi2d) Clock
generator circuit indivisually is working fine, but the clocks are
seriously distorted when I connect this circuit to the complete design.
How can I calculate the load the clock generator circuit is facing so that
I can place buffers using logical effort.

Regards
Meghna

 

[Guenther Sohler]

To measure a Pins capacitance, you could do a frequency sweep
with the pin connected to a dc voltage source. Seeing the current,
you can calculate the capacitance
C=I(f)/(U*2*pi*f)

rds

 

[fogh]

meghna wrote:

Hi,
I have designed a large circuit in Spectre and using two non-overlapping
clocks for my design. Also I am using delayed clocks for reducing charge
injection noise. (In all, the clocks are- phi1, phi1d, phi2, phi2d) Clock
generator circuit indivisually is working fine, but the clocks are
seriously distorted when I connect this circuit to the complete design.
How can I calculate the load the clock generator circuit is facing so that
I can place buffers using logical effort.

Q=CV
dQ=CdV+VdC
dQ=CdV
C=(dQ/dt)/(dV/dt)=I/deriv(V)

The load is how much charge it takes to get the potential to change.

I think I don t really understand your question. Is it about fan-out , impedance
matching ?