Clock frequency converter from 1.544MHz to 2.048MHz (or mult

[Martin]

Hi,

I'm using a PLL (HCT9046 from Philips) and I should convert
a T1 Clock (1.544MHz) to an frequency of 2.048MHz.

This is normal possible with an PLL. What I should have is a Divider,
which divides my 2.048MHz to a frequency of 1.544MHz.

Does anybody know how to do this?
The output clock should have if possible a duty cylce of 50%


Best regards
Martin

 

[John_H]

You need a PLL where both frequencies are divided to 8kHz (1544k/193=8k,
2048k/256=8k) to feed the phase comparator. That is unless you want to go
to multiply your input clock a 395.264 MHz (1.544M*256, 2.048M*193) and have
a 50% +/-0.25% duty cycle on the 2.048 MHz clock.

Standard PLL designs are typically divided to a low reference frequency and
require a stable VCO (or probably VCXO in your case) though there are other
techniques out there.


"Martin" <visepp@yahoo.de> wrote in message
news:2eca51ca.0404280548.231b65d0@posting.google.com...

Hi,

I'm using a PLL (HCT9046 from Philips) and I should convert
a T1 Clock (1.544MHz) to an frequency of 2.048MHz.

This is normal possible with an PLL. What I should have is a Divider,
which divides my 2.048MHz to a frequency of 1.544MHz.

Does anybody know how to do this?
The output clock should have if possible a duty cylce of 50%


Best regards
Martin

 

[Austin Lesea]

There are a number of standard off the shelf components to do this,

Check out Dallas Semiconductor (now Maxim), Cypress Semi, ICST, etc.

Far too easy and two cheap single component solutions to do it on your own.

Re-inventing the wheel is not a good career move.

Austin

John_H wrote:

You need a PLL where both frequencies are divided to 8kHz (1544k/193=8k,
2048k/256=8k) to feed the phase comparator. That is unless you want to go
to multiply your input clock a 395.264 MHz (1.544M*256, 2.048M*193) and have
a 50% +/-0.25% duty cycle on the 2.048 MHz clock.

Standard PLL designs are typically divided to a low reference frequency and
require a stable VCO (or probably VCXO in your case) though there are other
techniques out there.


"Martin" <visepp@yahoo.de> wrote in message
news:2eca51ca.0404280548.231b65d0@posting.google.com...

Hi,

I'm using a PLL (HCT9046 from Philips) and I should convert
a T1 Clock (1.544MHz) to an frequency of 2.048MHz.

This is normal possible with an PLL. What I should have is a Divider,
which divides my 2.048MHz to a frequency of 1.544MHz.

Does anybody know how to do this?
The output clock should have if possible a duty cylce of 50%


Best regards
Martin

 

[Simon Peacock]

If your wanting to convert E1 to T1 (as it sounds like). Check out the IDT
SuperJET. It converts the clocks and the data both at the same time
so you've got a framer, LIU and clock gen all in one chip!

Simon

"Austin Lesea" <austin@xilinx.com> wrote in message
news:c6orap$1u21@cliff.xsj.xilinx.com...

There are a number of standard off the shelf components to do this,

Check out Dallas Semiconductor (now Maxim), Cypress Semi, ICST, etc.

Far too easy and two cheap single component solutions to do it on your
own.

Re-inventing the wheel is not a good career move.

Austin

John_H wrote:
You need a PLL where both frequencies are divided to 8kHz (1544k/193=8k,
2048k/256=8k) to feed the phase comparator. That is unless you want to
go
to multiply your input clock a 395.264 MHz (1.544M*256, 2.048M*193) and
have
a 50% +/-0.25% duty cycle on the 2.048 MHz clock.

Standard PLL designs are typically divided to a low reference frequency
and
require a stable VCO (or probably VCXO in your case) though there are
other
techniques out there.


"Martin" <visepp@yahoo.de> wrote in message
news:2eca51ca.0404280548.231b65d0@posting.google.com...

Hi,

I'm using a PLL (HCT9046 from Philips) and I should convert
a T1 Clock (1.544MHz) to an frequency of 2.048MHz.

This is normal possible with an PLL. What I should have is a Divider,
which divides my 2.048MHz to a frequency of 1.544MHz.

Does anybody know how to do this?
The output clock should have if possible a duty cylce of 50%


Best regards
Martin