Clipping in Simple Emitter Follower Circuit

On Mar 2, 1:15 pm, Eeyore <rabbitsfriendsandrelati...@hotmail.com>
wrote:

Andrew Holme wrote:
In addition to the emitter resistor which has already been mentioned, there
is a 1k load resistor returned to ground and the explanation quoted above
actually begins:

Well that explains it ! The furthest it'll swing negative is set by potential
divider effect.

Well, despite the best efforts of you gentlemen, the situation
still strikes me as murky. The load indicated in the diagram
(which it was very remiss of me to fail to mention) is a simple
1K resistor connected downwards to the ground symbol. But
as I said (and thanks to the poster with the book handy), there
is a "rail" (I guess you say) of +10V at the top of the diagram
directly connect to the collector and a -10V connected to the
bottom of the 1K emitter resistor.

Is "ground" supposed to be -10V or 0V here? If it's -10V,
then the load 1K and emitter 1K are merely in parallel and
the problem remains. If it is 0V, then yeah, there is a
voltage divider effect I can calculate (after all, the emitter
is swinging to negative voltages). Is this latter the solution
to the problem?

Thanks,
Lee

 

Many thanks to all, especially John Popelish. Yes, the 1K between the
-10V and the emitter, together with the 1K between the emitter and
ground, holds the emitter at -5 volts. So the base cannot cause the
emitter (which follows it) to go below -5. Very nice.

Thanks again,
yours, Lee Corbin

 

[John Popelish]

lcorbin@tsoft.com wrote:

Well, despite the best efforts of you gentlemen, the situation
still strikes me as murky. The load indicated in the diagram
(which it was very remiss of me to fail to mention) is a simple
1K resistor connected downwards to the ground symbol. But
as I said (and thanks to the poster with the book handy), there
is a "rail" (I guess you say) of +10V at the top of the diagram
directly connect to the collector and a -10V connected to the
bottom of the 1K emitter resistor.

Is "ground" supposed to be -10V or 0V here?

It is the zero volt reference that each of the two power
supplies is measured with respect to. you have to have some
place to connect that other volt meter lead.

If it's -10V,
then the load 1K and emitter 1K are merely in parallel and
the problem remains. If it is 0V, then yeah, there is a
voltage divider effect I can calculate (after all, the emitter
is swinging to negative voltages). Is this latter the solution
to the problem?

Yes.

--
Regards,

John Popelish

 

I have a question. On pages 54-55 of Horowitz and Hill's classic "The
Art of Electronics" (first edition), there is a nice description of
the emitter follower circuit. The following is used as an example:

The bottom of the diagram is at -10 volts and the top is at
+10 volts (i.e. a 20volt supply somewhere). Just above the
-10 volts is a 1K resistor, and above that the emitter of an
NPN transistor. There is no resistor between the collector
and the +10 volts. The experiment is to let the base voltage
(input) vary between +10 and -10. The output is taken
(hence "emitter-follower") at the top of the 1K resistor.

Because the base-emitter voltage is always around .6 volts,
the output naturally follows the input, but at .6 volts less.
That I understand.

But the book says that when the input voltage drops down
to -4.4 volts, the base-emitter junction gets back-biased,
(and the transistor turns off?). I don't understand why the
voltage on the base cannot keep going down, say to -6V,
with the output voltage continuing to keep in step, say at
-6.6. Even at -6 volts, there seems to me to be plenty
of leeway between that and the -10V source below it.

Here is their explanation:

"The output can swing to within a transistor saturation
voltage drop of VCC (about +9.9v) but it cannot go
more negative than -5 volts. That is because on the
extreme negative swing the transistor can do no more
than turn off, which it does at -4.4 volts input (-5V
output). Further netgative swing at the input results in
back-biasing of the base-emitter juntion, but no further
change in output."

I still don't see why the base could not be at, say, -6v
and the output .6 lower. Why should the base-emitter
junction be back-biased when there is still a big voltage
difference between the base and the -10 volts at bottom?

Could it be that if an NPN transistor,in an emitter follower
configuration say, does not get enough current, will that alone will
cause it to turn off? In other words, perhaps the emitter voltage
can go so low that not enough electron current is drawn through
the emitter resistor to keep it on, even though the base/emitter
voltage is still well above .6V?

Thanks a lot.

 

[John Popelish]

lcorbin@tsoft.com wrote:

I have a question. On pages 54-55 of Horowitz and Hill's classic "The
Art of Electronics" (first edition), there is a nice description of
the emitter follower circuit. The following is used as an example:

The bottom of the diagram is at -10 volts and the top is at
+10 volts (i.e. a 20volt supply somewhere). Just above the
-10 volts is a 1K resistor, and above that the emitter of an
NPN transistor. There is no resistor between the collector
and the +10 volts. The experiment is to let the base voltage
(input) vary between +10 and -10. The output is taken
(hence "emitter-follower") at the top of the 1K resistor.

Because the base-emitter voltage is always around .6 volts,
the output naturally follows the input, but at .6 volts less.
That I understand.

But the book says that when the input voltage drops down
to -4.4 volts, the base-emitter junction gets back-biased,
(and the transistor turns off?). I don't understand why the
voltage on the base cannot keep going down, say to -6V,
with the output voltage continuing to keep in step, say at
-6.6. Even at -6 volts, there seems to me to be plenty
of leeway between that and the -10V source below it.

Here is their explanation:

"The output can swing to within a transistor saturation
voltage drop of VCC (about +9.9v) but it cannot go
more negative than -5 volts. That is because on the
extreme negative swing the transistor can do no more
than turn off, which it does at -4.4 volts input (-5V
output). Further netgative swing at the input results in
back-biasing of the base-emitter juntion, but no further
change in output."

I still don't see why the base could not be at, say, -6v
and the output .6 lower. Why should the base-emitter
junction be back-biased when there is still a big voltage
difference between the base and the -10 volts at bottom?

Could it be that if an NPN transistor,in an emitter follower
configuration say, does not get enough current, will that alone will
cause it to turn off? In other words, perhaps the emitter voltage
can go so low that not enough electron current is drawn through
the emitter resistor to keep it on, even though the base/emitter
voltage is still well above .6V?

Perhaps someone with a copy of the first addition can double
check your reading, but if it is exactly as you say, I agree
that there is no good reason the output voltage cannot swing
almost all the way to the negative supply rail (all the way
down to about zero load current).

Are you sure there is nothing else shown connected to the
emitter? A capacitively coupled additional load, perhaps?

--
Regards,

John Popelish

 

[John Fields]

On Sun, 2 Mar 2008 10:44:57 -0800 (PST), lcorbin@tsoft.com wrote:

I have a question. On pages 54-55 of Horowitz and Hill's classic "The
Art of Electronics" (first edition), there is a nice description of
the emitter follower circuit. The following is used as an example:

The bottom of the diagram is at -10 volts and the top is at
+10 volts (i.e. a 20volt supply somewhere). Just above the
-10 volts is a 1K resistor, and above that the emitter of an
NPN transistor. There is no resistor between the collector
and the +10 volts. The experiment is to let the base voltage
(input) vary between +10 and -10. The output is taken
(hence "emitter-follower") at the top of the 1K resistor.

Because the base-emitter voltage is always around .6 volts,
the output naturally follows the input, but at .6 volts less.
That I understand.

But the book says that when the input voltage drops down
to -4.4 volts, the base-emitter junction gets back-biased,
(and the transistor turns off?). I don't understand why the
voltage on the base cannot keep going down, say to -6V,
with the output voltage continuing to keep in step, say at
-6.6. Even at -6 volts, there seems to me to be plenty
of leeway between that and the -10V source below it.

Here is their explanation:

"The output can swing to within a transistor saturation
voltage drop of VCC (about +9.9v) but it cannot go
more negative than -5 volts. That is because on the
extreme negative swing the transistor can do no more
than turn off, which it does at -4.4 volts input (-5V
output). Further netgative swing at the input results in
back-biasing of the base-emitter juntion, but no further
change in output."

I still don't see why the base could not be at, say, -6v
and the output .6 lower. Why should the base-emitter
junction be back-biased when there is still a big voltage
difference between the base and the -10 volts at bottom?

---
LTspice agrees with you:

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TEXT -242 536 Left 0 !.tran 2

--
JF

 

[Andrew Holme]

"John Popelish" <jpopelish@rica.net> wrote in message
news:TOCdnZ1hT8_HY1fanZ2dnUVZ_rKtnZ2d@comcast.com...

lcorbin@tsoft.com wrote:
I have a question. On pages 54-55 of Horowitz and Hill's classic "The
Art of Electronics" (first edition), there is a nice description of
the emitter follower circuit. The following is used as an example:

The bottom of the diagram is at -10 volts and the top is at
+10 volts (i.e. a 20volt supply somewhere). Just above the
-10 volts is a 1K resistor, and above that the emitter of an
NPN transistor. There is no resistor between the collector
and the +10 volts. The experiment is to let the base voltage
(input) vary between +10 and -10. The output is taken
(hence "emitter-follower") at the top of the 1K resistor.

Because the base-emitter voltage is always around .6 volts,
the output naturally follows the input, but at .6 volts less.
That I understand.

But the book says that when the input voltage drops down
to -4.4 volts, the base-emitter junction gets back-biased,
(and the transistor turns off?). I don't understand why the
voltage on the base cannot keep going down, say to -6V,
with the output voltage continuing to keep in step, say at
-6.6. Even at -6 volts, there seems to me to be plenty
of leeway between that and the -10V source below it.

Here is their explanation:

"The output can swing to within a transistor saturation
voltage drop of VCC (about +9.9v) but it cannot go
more negative than -5 volts. That is because on the
extreme negative swing the transistor can do no more
than turn off, which it does at -4.4 volts input (-5V
output). Further netgative swing at the input results in
back-biasing of the base-emitter juntion, but no further
change in output."

I still don't see why the base could not be at, say, -6v
and the output .6 lower. Why should the base-emitter
junction be back-biased when there is still a big voltage
difference between the base and the -10 volts at bottom?

Could it be that if an NPN transistor,in an emitter follower
configuration say, does not get enough current, will that alone will
cause it to turn off? In other words, perhaps the emitter voltage
can go so low that not enough electron current is drawn through
the emitter resistor to keep it on, even though the base/emitter
voltage is still well above .6V?

Perhaps someone with a copy of the first addition can double check your
reading, but if it is exactly as you say, I agree that there is no good
reason the output voltage cannot swing almost all the way to the negative
supply rail (all the way down to about zero load current).

Are you sure there is nothing else shown connected to the emitter? A
capacitively coupled additional load, perhaps?

In addition to the emitter resistor which has already been mentioned, there
is a 1k load resistor returned to ground and the explanation quoted above
actually begins:

"For instance, in the loaded circuit shown in Figure 2.7 the output can
swing to within a transistor saturation ..."

 

[John Popelish]

Andrew Holme wrote:

"John Popelish" <jpopelish@rica.net> wrote in message
news:TOCdnZ1hT8_HY1fanZ2dnUVZ_rKtnZ2d@comcast.com...
lcorbin@tsoft.com wrote:
I have a question. On pages 54-55 of Horowitz and Hill's classic "The
Art of Electronics" (first edition), there is a nice description of
the emitter follower circuit. The following is used as an example:

The bottom of the diagram is at -10 volts and the top is at
+10 volts (i.e. a 20volt supply somewhere). Just above the
-10 volts is a 1K resistor, and above that the emitter of an
NPN transistor. There is no resistor between the collector
and the +10 volts. The experiment is to let the base voltage
(input) vary between +10 and -10. The output is taken
(hence "emitter-follower") at the top of the 1K resistor.

Because the base-emitter voltage is always around .6 volts,
the output naturally follows the input, but at .6 volts less.
That I understand.

But the book says that when the input voltage drops down
to -4.4 volts, the base-emitter junction gets back-biased,
(and the transistor turns off?). I don't understand why the
voltage on the base cannot keep going down, say to -6V,
with the output voltage continuing to keep in step, say at
-6.6. Even at -6 volts, there seems to me to be plenty
of leeway between that and the -10V source below it.

Here is their explanation:

"The output can swing to within a transistor saturation
voltage drop of VCC (about +9.9v) but it cannot go
more negative than -5 volts. That is because on the
extreme negative swing the transistor can do no more
than turn off, which it does at -4.4 volts input (-5V
output). Further netgative swing at the input results in
back-biasing of the base-emitter juntion, but no further
change in output."

I still don't see why the base could not be at, say, -6v
and the output .6 lower. Why should the base-emitter
junction be back-biased when there is still a big voltage
difference between the base and the -10 volts at bottom?

Could it be that if an NPN transistor,in an emitter follower
configuration say, does not get enough current, will that alone will
cause it to turn off? In other words, perhaps the emitter voltage
can go so low that not enough electron current is drawn through
the emitter resistor to keep it on, even though the base/emitter
voltage is still well above .6V?
Perhaps someone with a copy of the first addition can double check your
reading, but if it is exactly as you say, I agree that there is no good
reason the output voltage cannot swing almost all the way to the negative
supply rail (all the way down to about zero load current).

Are you sure there is nothing else shown connected to the emitter? A
capacitively coupled additional load, perhaps?

In addition to the emitter resistor which has already been mentioned, there
is a 1k load resistor returned to ground and the explanation quoted above
actually begins:

"For instance, in the loaded circuit shown in Figure 2.7 the output can
swing to within a transistor saturation ..."

So the emitter voltage that corresponds to zero emitter
current (when the two emitter resistors connected in series
from ground to -10 and form a voltage divider) is -5 volts,
not -10. The emitter can only pull positive from that voltage.

--
Regards,

John Popelish

 

I still don't see why the base could not be at, say, -6v
and the output .6 lower. Why should the base-emitter
junction be back-biased when there is still a big voltage
difference between the base and the -10 volts at bottom?

Perhaps someone with a copy of the first addition can double
check your reading, but if it is exactly as you say, I agree
that there is no good reason the output voltage cannot swing
almost all the way to the negative supply rail (all the way
down to about zero load current).

Are you sure there is nothing else shown connected to the
emitter? A capacitively coupled additional load, perhaps?

Maybe I should have paid more attention to that, because you are
right! There is a "dotted line" leading to a 1K resistor that also
goes to ground, and it's labeled
"R-load". But I supposed that the next stage to be at high impedance,
and that besides, a 1K resistor in parallel to a 1K resistor would
just be a .5K resistor, and wouldn't the problem still remain?"

Thanks again.

 

[John Popelish]

lcorbin@tsoft.com wrote:

John popelish wrote:
Are you sure there is nothing else shown connected to the
emitter? A capacitively coupled additional load, perhaps?

Maybe I should have paid more attention to that, because you are
right! There is a "dotted line" leading to a 1K resistor that also
goes to ground, and it's labeled
"R-load". But I supposed that the next stage to be at high impedance,
and that besides, a 1K resistor in parallel to a 1K resistor would
just be a .5K resistor, and wouldn't the problem still remain?"

If they both connected to the same DC voltage, they would be
equivalent to a 0.5k resistor to that voltage. But if they
connect to different voltages, they are equivalent to a 0.5
k resistor connected to a voltage that is the average of the
two actual voltages the two separate resistors connect to.
Make that replacement and go over your analysis, again.

--
Regards,

John Popelish

 

[Eeyore]

Andrew Holme wrote:

In addition to the emitter resistor which has already been mentioned, there
is a 1k load resistor returned to ground and the explanation quoted above
actually begins:

Well that explains it ! The furthest it'll swing negative is set by potential
divider effect.

Graham

 

[Eeyore]

John Popelish wrote:

lcorbin@tsoft.com wrote:
John popelish wrote:
Are you sure there is nothing else shown connected to the
emitter? A capacitively coupled additional load, perhaps?

Maybe I should have paid more attention to that, because you are
right! There is a "dotted line" leading to a 1K resistor that also
goes to ground, and it's labeled
"R-load". But I supposed that the next stage to be at high impedance,
and that besides, a 1K resistor in parallel to a 1K resistor would
just be a .5K resistor, and wouldn't the problem still remain?"

If they both connected to the same DC voltage, they would be
equivalent to a 0.5k resistor to that voltage. But if they
connect to different voltages, they are equivalent to a 0.5
k resistor connected to a voltage that is the average of the
two actual voltages the two separate resistors connect to.
Make that replacement and go over your analysis, again.

Exactly. The OP should read up on Thevenin and Norton analysis.

Graham

 

[John Popelish]

Eeyore wrote:

John Popelish wrote:
lcorbin@tsoft.com wrote:

Maybe I should have paid more attention to that, because you are
right! There is a "dotted line" leading to a 1K resistor that also
goes to ground, and it's labeled
"R-load". But I supposed that the next stage to be at high impedance,
and that besides, a 1K resistor in parallel to a 1K resistor would
just be a .5K resistor, and wouldn't the problem still remain?"
If they both connected to the same DC voltage, they would be
equivalent to a 0.5k resistor to that voltage. But if they
connect to different voltages, they are equivalent to a 0.5
k resistor connected to a voltage that is the average of the
two actual voltages the two separate resistors connect to.
Make that replacement and go over your analysis, again.

Exactly. The OP should read up on Thevenin and Norton analysis.

A point I would like to make is that this example is exactly
the lesson the original poster, M. Hamed complained that he
had never seen in any tutorial material.

--
Regards,

John Popelish