Circuit golf...

C

Clifford Heath

Guest
Here\'s a \"circuit golf\" challenge (the goal is to solve the problem in
minimum cost/complexity without using specialised components.

The \"HomeBus\" communication standard (which Mitsubishi calls M-Net and
some others refer to as P1P2) sends 9600 baud RS232 bytes using inverted
\"alternate mark inversion\" (successive zero bits are sent 2V pulses with
alternating phases) on a 12-15V multi-drop wire pair of indeterminate
connection polarity.

<https://echonet.jp/wp/wp-content/uploads/pdf/General/Standard/Echonet/Version_2_11_en/spec_v211e_3.pdf>
<https://www.maximintegrated.com/en/design/technical-documents/app-notes/7/7224.html>

Your goal is to detect both +ve and -ve pulses, and stretch them both to
100us +ve pulses so they can be fed into a UART to make a HomeBus
receiver. There are chips to do this, e.g. MM1192/XL1192, MAX22088.
Those are disallowed for this challenge.

To get you started, here\'s a schematic that would not win any prizes:
<https://github.com/LenShustek/M-NET-Sniffer/blob/master/Inside_MNET_01.pdf>

Clifford Heath
 
On 2020-09-03, Clifford Heath <no.spam@please.net> wrote:
Here\'s a \"circuit golf\" challenge (the goal is to solve the problem in
minimum cost/complexity without using specialised components.

The \"HomeBus\" communication standard (which Mitsubishi calls M-Net and
some others refer to as P1P2) sends 9600 baud RS232 bytes using inverted
\"alternate mark inversion\" (successive zero bits are sent 2V pulses with
alternating phases) on a 12-15V multi-drop wire pair of indeterminate
connection polarity.

https://echonet.jp/wp/wp-content/uploads/pdf/General/Standard/Echonet/Version_2_11_en/spec_v211e_3.pdf
https://www.maximintegrated.com/en/design/technical-documents/app-notes/7/7224.html

Your goal is to detect both +ve and -ve pulses, and stretch them both to
100us +ve pulses so they can be fed into a UART to make a HomeBus
receiver. There are chips to do this, e.g. MM1192/XL1192, MAX22088.
Those are disallowed for this challenge.

To get you started, here\'s a schematic that would not win any prizes:
https://github.com/LenShustek/M-NET-Sniffer/blob/master/Inside_MNET_01.pdf

Clifford Heath

2 capacitors -> bridge rectifier (top to vcc bottom to...) -> 1K ->
common emitter pnp transistor, (to timing node of) 555 monostable (27uS rest-state high)

8 to 11 parts depending on how you count the rectifier.

not a good solution (succecptable to HF noise, common mode noise, and
distortion...) but very golf.

--
Jasen.
 
On 03/09/2020 4:54 am, Jasen Betts wrote:
On 2020-09-03, Clifford Heath <no.spam@please.net> wrote:
Here\'s a \"circuit golf\" challenge (the goal is to solve the problem in
minimum cost/complexity without using specialised components.

The \"HomeBus\" communication standard (which Mitsubishi calls M-Net and
some others refer to as P1P2) sends 9600 baud RS232 bytes using inverted
\"alternate mark inversion\" (successive zero bits are sent 2V pulses with
alternating phases) on a 12-15V multi-drop wire pair of indeterminate
connection polarity.

https://echonet.jp/wp/wp-content/uploads/pdf/General/Standard/Echonet/Version_2_11_en/spec_v211e_3.pdf
https://www.maximintegrated.com/en/design/technical-documents/app-notes/7/7224.html

Your goal is to detect both +ve and -ve pulses, and stretch them both to
100us +ve pulses so they can be fed into a UART to make a HomeBus
receiver. There are chips to do this, e.g. MM1192/XL1192, MAX22088.
Those are disallowed for this challenge.

To get you started, here\'s a schematic that would not win any prizes:
https://github.com/LenShustek/M-NET-Sniffer/blob/master/Inside_MNET_01.pdf

Clifford Heath

2 capacitors -> bridge rectifier (top to vcc bottom to...) -> 1K -
common emitter pnp transistor, (to timing node of) 555 monostable (27uS rest-state high)

8 to 11 parts depending on how you count the rectifier.

not a good solution (succecptable to HF noise, common mode noise, and
distortion...) but very golf.

Should be enough signal swing to illuminate an IRED so here is my idea:

<https://www.dropbox.com/s/nmy56z7fakivm70/CH_challenge_MNET.JPG?dl=0>

Nice challenge, thanks.

piglet
 
Not going to get much cheaper than a single MCU for the whole stack, no?

It\'ll need coupling, filtering and protection, but that\'s fairly academic.

With a bitrate that low, you might as well acquire it with ADC and DSP the
whole thing.

Even mere ATMEGAs have been made to talk USB, Ethernet and others. Recently
saw an article, someone did this for an old HP two-wire serial protocol that
was popular with their calculators, PCs, and some test equipment, from the
70s.

Very simple method if you don\'t mind that the input voltage threshold might
be a bit crap. Which means, it may not be exactly production ready; but
even then, calibration can often be applied at nearly no cost.

Now, I gather this is some kind of modulated RF signaling? Sampling that
real-time will require a good bit of grunt (nothing a modestly priced ARM
can\'t manage), else with some signal conditioning (PWMDAC bias + internal
analog comparator) it could be detected directly (GPIO) or with the help of
a timer (frequency counter or missing-pulse detector?). Generous filtering
and error correction in the digital domain, and you\'re pretty much done.

Might not be all that quick to implement, but so what. What if someone
wants a different operation mode? Back to the soldering bench all over
again; whereas the MCU can just load up another code module and it\'s off
running. ;-)

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

\"Clifford Heath\" <no.spam@please.net> wrote in message
news:NHW3H.115418$1a1.42802@fx18.iad...
Here\'s a \"circuit golf\" challenge (the goal is to solve the problem in
minimum cost/complexity without using specialised components.

The \"HomeBus\" communication standard (which Mitsubishi calls M-Net and
some others refer to as P1P2) sends 9600 baud RS232 bytes using inverted
\"alternate mark inversion\" (successive zero bits are sent 2V pulses with
alternating phases) on a 12-15V multi-drop wire pair of indeterminate
connection polarity.

https://echonet.jp/wp/wp-content/uploads/pdf/General/Standard/Echonet/Version_2_11_en/spec_v211e_3.pdf
https://www.maximintegrated.com/en/design/technical-documents/app-notes/7/7224.html

Your goal is to detect both +ve and -ve pulses, and stretch them both to
100us +ve pulses so they can be fed into a UART to make a HomeBus
receiver. There are chips to do this, e.g. MM1192/XL1192, MAX22088. Those
are disallowed for this challenge.

To get you started, here\'s a schematic that would not win any prizes:
https://github.com/LenShustek/M-NET-Sniffer/blob/master/Inside_MNET_01.pdf

Clifford Heath
 
On 2020-09-03, Tim Williams <tiwill@seventransistorlabs.com> wrote:
Not going to get much cheaper than a single MCU for the whole stack, no?

It\'ll need coupling, filtering and protection, but that\'s fairly academic.

With a bitrate that low, you might as well acquire it with ADC and DSP the
whole thing.

Even mere ATMEGAs have been made to talk USB, Ethernet and others. Recently
saw an article, someone did this for an old HP two-wire serial protocol that
was popular with their calculators, PCs, and some test equipment, from the
70s.

Very simple method if you don\'t mind that the input voltage threshold might
be a bit crap. Which means, it may not be exactly production ready; but
even then, calibration can often be applied at nearly no cost.

Now, I gather this is some kind of modulated RF signaling? Sampling that
real-time will require a good bit of grunt (nothing a modestly priced ARM
can\'t manage), else with some signal conditioning (PWMDAC bias + internal
analog comparator) it could be detected directly (GPIO) or with the help of
a timer (frequency counter or missing-pulse detector?). Generous filtering
and error correction in the digital domain, and you\'re pretty much done.

I gathered that it was the wired protocol where most of the energy is below
9600 Hz

Might not be all that quick to implement, but so what. What if someone
wants a different operation mode? Back to the soldering bench all over
again; whereas the MCU can just load up another code module and it\'s off
running. ;-)

you make a good point, an ATTINY25 ADC takes 13 clocks to perform a
conversion, so at 200kHz ADC clock would be fast enough to recveive the
information although at such a low sample rate (15Khz), the DSP code
will be working hard to extract timing information from blurred
slopes. (processor speed is about 16MIPS with no mupliply in the ATTINY)
clocked at 1 MHZ the ADC will be noiser but the edges with be clearer.

Maybe a GreenPAK would be a better choice SLG46534, three comparators,
8-state finite state machine, and bunch of clocks, LUTs, timers, and other
goodies, $0.25 in eaches, or $0.25 factory programmed @qty 500
only needs few resisters to scale the inputs, some variant 16QFN package,

--
Jasen.
 
On 4/9/20 5:15 am, Tim Williams wrote:
> Not going to get much cheaper than a single MCU for the whole stack, no?

Not really in the spirit of circuit golf (which includes \"why use a
million transistors when four will do?\").

My objective is to get clean RS-232 to feed to a (hardware) UART, not to
build a software UART.

> Now, I gather this is some kind of modulated RF signaling?

No, it\'s just an encoded form of 9600 baud RS-232, superimposed on a DC
supply line using alternate space encoding.

> Might not be all that quick to implement, but so what.

Again; circuit golf is about economical circuits you can make from
recycled jelly-bean parts on a Saturday afternoon.

CH
 

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