chipscope nuance question?

  • Thread starter Matthew E Rosenthal
  • Start date
M

Matthew E Rosenthal

Guest
So i have been using chipscope for 4 months now and lately its been much
easier to use because when I want to select nets I get a full hiearchy to
look through.
but somethign changed in my design(i do not know wut) and now I no longer
get the nice hiearchy. just a giant list of alphabetized nets.

How do i get the hiearchy back?

Thanks

Matt
 
Matthew,
Sounds like you've flattened the hierarchy somehow. Check the options for
the processes in Navigator. Or maybe your synthesis tool.
Chipscope is a wonderful thing. I haven't used a logic analyser for years.
And as the parts get faster, so does Chipscope. I use it to debug my home
brew soft processor. You can export the analysis results and I run a Perl
script to view the disassembly. Xilinx should do an integrated version for
MicroBlaze and PowerPC.
Cheers, Syms.
 
Syms,
Thanks for your help. Looks like I checked a flag to flatten the hiearchy
in order to try to make the design run faster.


thanks

Matt

On Wed, 5 May 2004, Symon wrote:

Matthew,
Sounds like you've flattened the hierarchy somehow. Check the options for
the processes in Navigator. Or maybe your synthesis tool.
Chipscope is a wonderful thing. I haven't used a logic analyser for years.
And as the parts get faster, so does Chipscope. I use it to debug my home
brew soft processor. You can export the analysis results and I run a Perl
script to view the disassembly. Xilinx should do an integrated version for
MicroBlaze and PowerPC.
Cheers, Syms.
 

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