CDL netlist format

[Nikolaos Kasparidis]

Is there any good source on the net explaining the format of a CDL
netlist. I need to create a netlist manually because I am using some
devices which do not support the CDL format. I could not find anything
usefull in the cadence documentation, but if you have a reference
please point to. From what I have figured out, my whole design is
described as a subcircuit. I have the impression that my device need
to be described as a subcircuit too, but am not sure how it should be
done.

From netlisting other devices, I reached this conclusion
I think it should be descibed with something like that, but this think
does not work. It doesn't like my XmyDev device.

..SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 \ W=10 L=5
..ENDS

From cadence documentation I have reached the conclusion that it
should look like the following, which still doesn't work

..SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 $[myDevice] $W=10 $L=5
..ENDS

I would appreciate any help provided
Happy new year to everybody

 

[Richard Griffith]

After figuring out the format you should be able to write skill
functions to generate the required cdl netlist of the elements.

The CDF properties for the element contain references to netlisting
functions to be called to create the netlist for the element. Put your
own function in place and it if it generates the proper CDL format you
don't have to do anything outside of the interface.

Nikolaos Kasparidis wrote:

Is there any good source on the net explaining the format of a CDL
netlist. I need to create a netlist manually because I am using some
devices which do not support the CDL format. I could not find anything
usefull in the cadence documentation, but if you have a reference
please point to. From what I have figured out, my whole design is
described as a subcircuit. I have the impression that my device need
to be described as a subcircuit too, but am not sure how it should be
done.

From netlisting other devices, I reached this conclusion
I think it should be descibed with something like that, but this think
does not work. It doesn't like my XmyDev device.

.SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 \ W=10 L=5
.ENDS

From cadence documentation I have reached the conclusion that it
should look like the following, which still doesn't work

.SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 $[myDevice] $W=10 $L=5
.ENDS

I would appreciate any help provided
Happy new year to everybody

----== Posted via Newsfeeds.Com - Unlimited-Uncensored-Secure Usenet News==----
http://www.newsfeeds.com The #1 Newsgroup Service in the World! >100,000 Newsgroups
---= East/West-Coast Server Farms - Total Privacy via Encryption =---

 

So from what I understand, the netlist should like this

SUBCKT myDevSubCir p1 p2 W=10 L=5
..ENDS

SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 myDevSubCir W=20
..ENDS

Where the first subcircuit is my custom device, and the second
subcircuit is the top level circuit, from which I call my custom device
subcircuit. I also assume that the properties in my device subcircuit
(W=10 L=5) are the default parameters. The first parameter is overriden
(W=20) in my call, while the second is used as the default.
How close am I to the correct syntax? I have some other errors, which I
am trying to figure out, so I dont know for sure If everything I said
above is correct.

 

redhavoc@yahoo.co.uk wrote:

SUBCKT myDevSubCir p1 p2 W=10 L=5
.ENDS

SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 myDevSubCir W=20
.ENDS
clip
(W=10 L=5) are the default parameters. The first parameter is
overriden
(W=20) in my call, while the second is used as the default.
How close am I to the correct syntax?

That is correct. I assume you're probably feeding this to an
LVS tool of some sort. You may need to explicitly tell the
LVS tool (in a command file) that myDevSubCir is a primitive
device. For example, in Assura, you might say:

schematic(
genericDevice("myDevSubCir")
swapPins("myDevSubCir" "(p p1 p2)") ; if they're swapable
)

 

[Andrew Beckett]

Nikolaos,

The definition of the CDL format is in the "LOGLVS" chapter (Chapter 5 or 6,
from memory) of the Dracula Reference Manual.

From memory, box devices (which is what devices with an X prefix are) do not
support any parameterisation.

Where is the CDL netlist going - perhaps that route supports something a bit
more SPICE-like than CDL's rather limited subset.

Regards,

Andrew.

On 4 Jan 2005 00:47:29 -0800, redhavoc@yahoo.co.uk (Nikolaos Kasparidis)
wrote:

Is there any good source on the net explaining the format of a CDL
netlist. I need to create a netlist manually because I am using some
devices which do not support the CDL format. I could not find anything
usefull in the cadence documentation, but if you have a reference
please point to. From what I have figured out, my whole design is
described as a subcircuit. I have the impression that my device need
to be described as a subcircuit too, but am not sure how it should be
done.

From netlisting other devices, I reached this conclusion
I think it should be descibed with something like that, but this think
does not work. It doesn't like my XmyDev device.

.SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 \ W=10 L=5
.ENDS

From cadence documentation I have reached the conclusion that it
should look like the following, which still doesn't work

.SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 $[myDevice] $W=10 $L=5
.ENDS

I would appreciate any help provided
Happy new year to everybody

 

Nikolaos Kasparidis wrote:

Is there any good source on the net explaining the format of a CDL
netlist.

If you're a Cadence customer, the "Assura Physical Verification
Developer Guide" (.../doc/assuradev/assuradev.pdf) has an
excellent succinct CDL reference (appendix A). You can read
this from SourceLink even if you don't happen to currently
be an Assura user.

.SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 \ W=10 L=5
.ENDS

Here, XmyDev is an instance of .subckt "pin2", which has
a single pin, "pin1", and the backslash is a syntax error.

Not what you want, certainly. It would help if you told us
exactly what you're trying to do with what tool(s).

From cadence documentation I have reached the conclusion that it
should look like the following, which still doesn't work

.SUBCKT test_layout pin1 pin2
XmyDev pin1 pin2 $[myDevice] $W=10 $L=5
.ENDS

Again, "X"anything is a subckt instance, and the $[myDevice]
stuff is a syntax error (resistor, capacitor and inductor
model calls look like that). If your line said:

rmyDev pin1 pin2 $[myDevice] $W=10 $L=5
....that would happen to be legal resistor syntax.

-Jay-