Capacitance of gold at RF

[ryan alexander]

Hi,

Would someone be able to tell me a formula, rough, rule of thumb or
whatever, for working out the capacitance of and area of gold. I am trying
to optimise the size of gold tracks on a layout for direct probing. There
needs to be a large enough spread of gold to allow good current spreading
but not too large otherwise it will introduce to high a parasitic
capacitance.

TIA

Ryan

 

[Don Pearce]

On Mon, 15 Nov 2004 16:33:45 -0000, "ryan alexander"
<elp04rra_NoSpAm@MaPsOn_sheffield.ac.uk> wrote:

Hi,

Would someone be able to tell me a formula, rough, rule of thumb or
whatever, for working out the capacitance of and area of gold. I am trying
to optimise the size of gold tracks on a layout for direct probing. There
needs to be a large enough spread of gold to allow good current spreading
but not too large otherwise it will introduce to high a parasitic
capacitance.

TIA

Ryan

Being gold has nothing to do with it.

The formula is

e0 * er * a/d

where e0 is 8.86 e-12
er is whatever the board material is
a is the pad area (square metres)
d is the thickness of the material

d
Pearce Consulting
http://www.pearce.uk.com

 

[John Larkin]

On Mon, 15 Nov 2004 16:33:45 -0000, "ryan alexander"
<elp04rra_NoSpAm@MaPsOn_sheffield.ac.uk> wrote:

Hi,

Would someone be able to tell me a formula, rough, rule of thumb or
whatever, for working out the capacitance of and area of gold. I am trying
to optimise the size of gold tracks on a layout for direct probing. There
needs to be a large enough spread of gold to allow good current spreading
but not too large otherwise it will introduce to high a parasitic
capacitance.

TIA

Ryan

Gold is a conductor; it has no capacitance. Your substrate has
capacitance. So what we'd need to know is substrate type, geometry,
and location of other conductors, especially any ground planes.

Thicker gold will reduce spreading resistance and not affect
capacitance substantially.

What's the application?

John

 

[Genome]

"John Larkin" <jjlarkin@highlandSNIPtechTHISnologyPLEASE.com> wrote in
message news:0knhp09s36oajdrc2qtdf3pu0vfohqkgm1@4ax.com...

On Mon, 15 Nov 2004 16:33:45 -0000, "ryan alexander"
elp04rra_NoSpAm@MaPsOn_sheffield.ac.uk> wrote:

Hi,

Would someone be able to tell me a formula, rough, rule of thumb or
whatever, for working out the capacitance of and area of gold. I am
trying
to optimise the size of gold tracks on a layout for direct probing. There
needs to be a large enough spread of gold to allow good current spreading
but not too large otherwise it will introduce to high a parasitic
capacitance.

TIA

Ryan



Gold is a conductor; it has no capacitance. Your substrate has
capacitance. So what we'd need to know is substrate type, geometry,
and location of other conductors, especially any ground planes.

Thicker gold will reduce spreading resistance and not affect
capacitance substantially.

What's the application?

John

Substrates have dielectric constants (that vary).

DNA

 

[N. Thornton]

"ryan alexander" <elp04rra_NoSpAm@MaPsOn_sheffield.ac.uk> wrote in message news:<cnalp9$8ha$1@hermes.shef.ac.uk>...

Hi,

Would someone be able to tell me a formula, rough, rule of thumb or
whatever, for working out the capacitance of and area of gold. I am trying
to optimise the size of gold tracks on a layout for direct probing. There
needs to be a large enough spread of gold to allow good current spreading
but not too large otherwise it will introduce to high a parasitic
capacitance.

TIA

Ryan

Theres always the chance you might not know that solder coating the
pcb tracks is a very effective way to drop R. Just leave the tracks
bare and they coat during flow soldering. On big tracks, Printing dots
on them keeps the solder thickness down.


NT

 

[Winfield Hill]

N. Thornton wrote...

Theres always the chance you might not know that solder coating the
pcb tracks is a very effective way to drop R. Just leave the tracks
bare and they coat during flow soldering. On big tracks, Printing
dots on them keeps the solder thickness down.

Silk-screen dots? Nice. Have you any measurement data for us?


--
Thanks,
- Win

 

[Rich Grise]

On Tue, 16 Nov 2004 01:48:03 -0800, Winfield Hill wrote:

N. Thornton wrote...

Theres always the chance you might not know that solder coating the
pcb tracks is a very effective way to drop R. Just leave the tracks
bare and they coat during flow soldering. On big tracks, Printing
dots on them keeps the solder thickness down.

Silk-screen dots? Nice. Have you any measurement data for us?

Of course! Just run your thumb across a fat trace that's been solder-
dipped, and run your thumb across a fat trace with dots that's been
solder-dipped. The one without the dots will be all bumpy and icky. ;-)

This is the origin of the term "rule of thumb." ;-P
(going by the seat of one's pants is not recommended except for very
large pours.)

Thanks!
Rich

 

[N. Thornton]

Winfield Hill <hill_a@t_rowland-dotties-harvard-dot.s-edu> wrote in message news:<cncicj0280k@drn.newsguy.com>...

N. Thornton wrote...

Theres always the chance you might not know that solder coating the
pcb tracks is a very effective way to drop R. Just leave the tracks
bare and they coat during flow soldering. On big tracks, Printing
dots on them keeps the solder thickness down.

Silk-screen dots? Nice. Have you any measurement data for us?

No, sorry. :/

NT

 

[Paul Burke]

Rich Grise wrote:

This is the origin of the term "rule of thumb." ;-P
(going by the seat of one's pants is not recommended except for very
large pours.)

No, Rule of Thumb comes from the horrific tale of Little Suckathumb and
the Red Legged Scissor Man. The rule is don't.

Paul Burke