S
Subhajit Sen
Guest
I am using Spice3 derived simulator to do an op.point
analysis of MOS transistor based VLSI circuit. The bias point
as well as DC small signal parameters for each transistor
is ok. The Cgs value is also ok ((2/3)*Cox*W*L).
However, other capacitances don't e.g. it is printing
Cgd=0, Cbd=0. The model file I am using uses Level=49 from
TSMC and the capacitance parameters e.g. Cgdso appear to
be ok i.e. non-zero (tho' I don't understand BSIM cap. models
well). My question is what is going wrong: the simulator or
the model? Or the way the simulator is handling/interpreting
the capacitance model?
On a related note: I am aware HSPICE computes capacitances
through pre-processing a "transcapacitance" matrix. As per
my understanding, the
Cgs, Cgd, Cgb etc. are computed by summing from entries
in this matrix. Could
this preprocessing be an issue (i.e. the simulator perhaps
does not handle this)?
Regards,
Subhajit Sen
analysis of MOS transistor based VLSI circuit. The bias point
as well as DC small signal parameters for each transistor
is ok. The Cgs value is also ok ((2/3)*Cox*W*L).
However, other capacitances don't e.g. it is printing
Cgd=0, Cbd=0. The model file I am using uses Level=49 from
TSMC and the capacitance parameters e.g. Cgdso appear to
be ok i.e. non-zero (tho' I don't understand BSIM cap. models
well). My question is what is going wrong: the simulator or
the model? Or the way the simulator is handling/interpreting
the capacitance model?
On a related note: I am aware HSPICE computes capacitances
through pre-processing a "transcapacitance" matrix. As per
my understanding, the
Cgs, Cgd, Cgb etc. are computed by summing from entries
in this matrix. Could
this preprocessing be an issue (i.e. the simulator perhaps
does not handle this)?
Regards,
Subhajit Sen