P
parag_paul@hotmail.com
Guest
hi all,
IN verilog, can we instantiate modules from tasks and functinos
IN verilog, can we instantiate modules from tasks and functinos
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J
Jonathan Bromley
Guest
On Wed, 14 Nov 2007 18:38:14 -0000,
"parag_paul@hotmail.com" wrote:
no sense to me.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
"parag_paul@hotmail.com" wrote:
No. What do you have in mind when you say this? It makesIN verilog, can we instantiate modules from tasks and functinos
no sense to me.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
P
parag_paul@hotmail.com
Guest
On Nov 14, 11:17 am, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:
implement some internal routines, where something like the one above
could kill me
But on the fly dynamic TB instantiation should be possible isnt it
wrote:
Sorry, I was just looking at some possible scenarios, I am trying toOn Wed, 14 Nov 2007 18:38:14 -0000,
"parag_p...@hotmail.com" wrote:
IN verilog, can we instantiate modules from tasks and functinos
No. What do you have in mind when you say this? It makes
no sense to me.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
implement some internal routines, where something like the one above
could kill me
But on the fly dynamic TB instantiation should be possible isnt it
J
Jonathan Bromley
Guest
On Wed, 14 Nov 2007 19:41:58 -0000,
<parag_paul@hotmail.com> wrote:
You absolutely CANNOT create module instances dynamically.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
<parag_paul@hotmail.com> wrote:
Only if you use SystemVerilog classes to implement the TB.But on the fly dynamic TB instantiation should be possible isnt it
You absolutely CANNOT create module instances dynamically.
--
Jonathan Bromley, Consultant
DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com
The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.