Can I use an internal reset signal in DLL?

R

Rajesh Murugesan

Guest
Hi all

The source clock pin of the DLL is from the external PLL, which
generates 2 different frequencies. As mentioned in the Application
note of Spartan II, if there is a change in the input frequency, usage
of the Reset pin is mandatory. I tried to generate an internal signal
as the reset signal and connected that internal signal to the reset
pin of the DLL. When the above mentioned logic was implemented, I got
errors stating that the internal signal has multiple drivers and the
input pad net has illegal connections.

1. Is that possible to use an internal signal as the reset signal?
----------------------------
START |------------|-------> START
| |
GENERATE FREQ I | | GENERATE FREQ II
| |
IF DONE | | IF DONE
| |
RESET_DLL = 0 | | RESET_DLL = 0
| |
WAIT FOR APP: 3ms | | WAIT FOR APP. 3ms
| |
STOP GEN. FREQ I | | STOP GEN. FREQ II
AND --- ------ AND
PULL RESET_DLL =1 PULL RESET_DLL = 1


RESET_DLL ---> is the internal signal which is used as the reset
signal and this internal signal is stimulated as mentioned above.

THE ERROR MESSAGE:

ERROR:NgdBuild:455 - logical net 'pll_serial_rst_modclk' has multiple
drivers.
The possible drivers causing this are pin q on block
pll_serial_rst_modclk
with type FDE, pin PAD on block pll_serial_rst_modclk.PAD with type
PAD
ERROR:NgdBuild:466 - input pad net 'pll_serial_rst_modclk' has illegal
connection. Possible pins causing this are pin i1 on block
pll_serial__n00171
with type LUT4, pin q on block pll_serial_rst_modclk with type FDE

Or is there any other possibility to implement the reset signal?

Eagerly waiting for your suggestions..

Thanks in advance..
Regards
Rajesh
 

Welcome to EDABoard.com

Sponsor

Back
Top