D
dinac
Guest
Hi all,
I would like to thank this forum and you all for helping me out at
various stages of my design .
I am in between my layout/lvs
I am using a capacitor cell 'crtmom'(model name: crtmom)
when doing the LVS, i get a
*********************************************
Error: No matching ".SUBCKT" statement for "CRTMOM" at line 31 in
file /../../netlist
ERROR: Source could not be read.
*** Calibre finished with Exit Code: 4 ***
**********************************
Please help
Thanks
din
I would like to thank this forum and you all for helping me out at
various stages of my design .
I am in between my layout/lvs
I am using a capacitor cell 'crtmom'(model name: crtmom)
when doing the LVS, i get a
*********************************************
Error: No matching ".SUBCKT" statement for "CRTMOM" at line 31 in
file /../../netlist
ERROR: Source could not be read.
*** Calibre finished with Exit Code: 4 ***
**********************************
Please help
Thanks
din