Cadence RCX - QRC help

[Reotaro Hashemoto]

Hi,

I am working on two verification flows from DRC to PEX; the first flow
is full Assura flow (DRC, LVS, and RCX), and the other flow is:
Calibre DRC/LVS -> Maping SVDB data through qurey server -> Run QRC.

What should be expected is to have the same output SPICE netlist out
from the two flows, or even with slight changes due to parasitics..

The problem i face is: In Calibre/EXT (Calibre/QRC) flow, when data
coming from the query server passes by QRC, the netlist suffer a
strange changes in:
- Device names (i care more for MOSFETs)
- Some net names are changed as if it's trying to rename nets that
comes more than once.
e.g. Mxxx A B C B ----------> Mxxx A B_32 C B (on of the B's were
renamed!!)
- There's some swapping in pins orders (e.g. Source and drain
connections)

How can this problem occure from??

I'm running QRC from command line as:

qrc RSF_rcx

Where RSF_rcs contains RCX runtime settings ( avParameters and
rcxParameters ) ... The contents of that file is shown below.

Can anyone hint where can the problem due to?!
Thanks a lot in advance,
Ahmad


;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; RSF_rcx
File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

setShellEnvVar( "ASSURA_AUTO_64BIT=ALL" )
setShellEnvVar( "ASSURA_CALIBRE_FLOW=t" )

avParameters(
?technology "c120_4m_LM_logic_tech" ; name
of the technology
?techLib "assura/assura_tech.lib" ;
path and name of the technology file
)

rcxParameters(
?lvsSource "hcci"
?hcciRunDir "./output"
?hcciRunName "Design"
?agdsLayerMapFile "./output/Design.gds.map"
?hcciNetProp 5
?hcciInstProp 6
?hcciDevProp 7
?outputFormat "spice"
?outputNetNameSpace "schematic"
?netNameSpace "schematic"
?output "myTry.spc" ; name of the
outputfile
?runName "rundir" ; directory name for the RCX files

;;; control of use models ;;;
?type "full" ; for fullchip extraction

?capExtractMode "coupled" ; for crosscoupled C extraction
?extractMosDiffusionRes t ; extract NRS/NRD for Mos transistors
?minC 1e-21
?minCByPercentage 0

;;; controls appearance and size of RC network ;;;
?subNodeChar "_" ; change, if net names contain "_", shorts
to parasitic subnode
?hierarchyDelimiter "_"
?deviceFingerDelimiter "_"
?fractureLengthUnits "squares"

;;; for IR-drop ;;;
?ignoreVias ( layers("sbcont" "nwcont") nets( "VSS" "VDD"))

;;; general entries ;;;
?parasiticCapModels "no"
?parasiticResModels "yes"
?capModels "yes"
?resModels "yes"
?resistor "presistor symbol ifxc11fl"
?capacitor "pcapacitor symbol ifxc11fl"
)


avRCX()