cache simulation in verilog/C

[mw3382]

Hi,

I am going to build a cache memory in Verilog and I would like real C
programs to use it. Can this be done using the PLI? If so then I assume it
is possible to pass some kind of pointer from the verilog simulation to a
C function thereby mapping verilog registers to actual memory addresses? I
have no idea so any advice would be much appreciated.

Thanks,
Mike

mike_wrighton@hotmail.com

 

[Narendran Kumaraguru Nath]

Hi Mike,

Verilog objects can be accessed through PLI. In this case you should
instead call a PLI routine to read / write to the memory address. In
my understanding - Even though they may be contiguous locations they
may not be implemented as continuous memory locations. Though you can
get handle to the reg array, which can be a pointer to the object, you
don't know the fields of the object and hence you can't manipulate it
directly. You've to rely on the PLI routines. Hence you can't get a
pointer and manipulate it as you thought you can!

Thanks & Regards,
Naren.

"mw3382" <mike_wrighton@hotmail.com> wrote in message news:<30157fda8142c26f8a7f849d11aca8ce@localhost.talkaboutprogramming.com>...

Hi,

I am going to build a cache memory in Verilog and I would like real C
programs to use it. Can this be done using the PLI? If so then I assume it
is possible to pass some kind of pointer from the verilog simulation to a
C function thereby mapping verilog registers to actual memory addresses? I
have no idea so any advice would be much appreciated.

Thanks,
Mike

mike_wrighton@hotmail.com

 

[Raymond Bingham]

"mw3382" <mike_wrighton@hotmail.com> wrote in message news:<30157fda8142c26f8a7f849d11aca8ce@localhost.talkaboutprogramming.com>...

Hi,

I am going to build a cache memory in Verilog and I would like real C
programs to use it. Can this be done using the PLI? If so then I assume it
is possible to pass some kind of pointer from the verilog simulation to a
C function thereby mapping verilog registers to actual memory addresses? I
have no idea so any advice would be much appreciated.

You should probably architect your cache so that the memory is all
done in C and Verilog interfaces to the cache using PLI.

If you want to keep your original plan, I suppose there's a way to do
this if you're simulator specific (VCS has a Direct C interface you
might try, dunno how successful you'd be, though). Verilog has no
concept of pointers, so passing a pointer would be, um...
interesting...

--Ray

 

[mw3382]

The thing really what I need is for the system to work backwards i.e. I
need to be able to call Verilog tasks/functions from C - not vice versa,
because the C program should control all memory accesses. Is this
possible?

thanks