cache simulation in verilog/C

M

mw3382

Guest
Hi,

I am going to build a cache memory in Verilog and I would like real C
programs to use it. Can this be done using the PLI? If so then I assume it
is possible to pass some kind of pointer from the verilog simulation to a
C function thereby mapping verilog registers to actual memory addresses? I
have no idea so any advice would be much appreciated.

Thanks,
Mike

mike_wrighton@hotmail.com
 
The thing really what I need is for the system to work backwards i.e. I
need to be able to call Verilog tasks/functions from C - not vice versa,
because the C program should control all memory accesses. Is this
possible?

thanks
 

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