Button clock

T

tupadre

Guest
Hi to everyone!

This is my first message here so first of all thanks to everyone to let m
post here!

I have a homework, it consists on writing a processor and make it work in
Spartan 3. I did the first but the second one is getting difficult. I jus
want to show my profesor that processor is working well so I want t
generate a clock event with a button or switch just like here
http://fpgawiki.dustingram.com/index.php?title=Button_Clock

My UCF is this one:

#PACE: Start of Constraints generated by PACE

NET "act_reg3" CLOCK_DEDICATED_ROUTE = FALSE;

#PACE: Start of PACE I/O Pin Assignments
NET "an0" LOC = "E13" ;
NET "an3" LOC = "F14" ;
NET "an2" LOC = "G14" ;
NET "an1" LOC = "d14" ;

#This is a button to simulate a clock
NET "simulated_clk" LOC = "M13" ;


######################### 8 Led
###########################################
NET "mult_lec" LOC = "K12" ;
NET "mult_esc" LOC = "P14" ;
NET "mult_ret" LOC = "L12" ;
NET "mult_pc" LOC = "N14" ;
NET "reg_w" LOC = "P13" ;
NET "call_w" LOC = "N12" ;
NET "sel_alu" LOC = "P12" ;

#I use this for another thing
NET "clk" LOC = "T9" ;

###################################### Segments
##########################################
NET "segmentos<6>" LOC = "E14" ;
NET "segmentos<5>" LOC = "G13" ;
NET "segmentos<4>" LOC = "N15" ;
NET "segmentos<3>" LOC = "P15" ;
NET "segmentos<2>" LOC = "R16" ;
NET "segmentos<1>" LOC = "F13" ;
NET "segmentos<0>" LOC = "N16" ;
NET "segmentos<7>" LOC = "P16" ;


####################################### Switche
###########################################
NET "act_reg1" LOC = "F12" ;
NET "act_reg2" LOC = "G12" ;
NET "act_reg3" LOC = "H14" ;


#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE




-------------------------------------------------------------------

And here is a fragment of my processor:

----PC process
process(inicio,simulated_clk)

variable pc_out: std_logic_vector (15 downto 0);
variable pc_high : std_logic_vector(15 downto 0);
begin
--Si es la primera vez que se carga
if inicio='0' then
pc<="0000000000000000";
reg_ret<="0000000000000000";
pc_out:="0000000000000000";
--Se ha cargado mĂĄs veces
elsif simulated='1' and simulated_clk'event then
pc_out:=pc;

....
end process;


I don't know why it doesn't work. As I said I just want to simulate a cloc
so to show my proffesor how the processor works step by step (instructio
by instruction).

Hope you can help. Thanks!

PD: Sorry for my poor English.



---------------------------------------
Posted through http://www.FPGARelated.com
 
Le 18/01/2013 21:32, tupadre a écrit :
Hi to everyone!
[...]
And here is a fragment of my processor:

----PC process
process(inicio,simulated_clk)

variable pc_out: std_logic_vector (15 downto 0);
variable pc_high : std_logic_vector(15 downto 0);
begin
--Si es la primera vez que se carga
if inicio='0' then
pc<="0000000000000000";
reg_ret<="0000000000000000";
pc_out:="0000000000000000";
--Se ha cargado mĂĄs veces
elsif simulated='1' and simulated_clk'event then
pc_out:=pc;

...
end process;


I don't know why it doesn't work. As I said I just want to simulate a clock
so to show my proffesor how the processor works step by step (instruction
by instruction).

Hope you can help. Thanks!
Hello
Your clock edge condition looks wrong, it should be :
elsif simulated_clk = '1' and simulated_clk'event then
or you can use the rising_edge function instead :
elsif rising_edge(simulated_clk) then

Nicolas
 
Le 18/01/2013 21:32, tupadre a �crit :
Hi to everyone!
[...]
And here is a fragment of my processor:

----PC process
process(inicio,simulated_clk)

variable pc_out: std_logic_vector (15 downto 0);
variable pc_high : std_logic_vector(15 downto 0);
begin
--Si es la primera vez que se carga
if inicio='0' then
pc<="0000000000000000";
reg_ret<="0000000000000000";
pc_out:="0000000000000000";
--Se ha cargado mĂĄs veces
elsif simulated='1' and simulated_clk'event then
pc_out:=pc;

...
end process;


I don't know why it doesn't work. As I said I just want to simulate
clock
so to show my proffesor how the processor works step by ste
(instruction
by instruction).

Hope you can help. Thanks!

Hello
Your clock edge condition looks wrong, it should be :
elsif simulated_clk = '1' and simulated_clk'event then
or you can use the rising_edge function instead :
elsif rising_edge(simulated_clk) then

Nicolas
First of all thanks for answering.

Yeah, you are right the code is wrong but is due to the translation fro
spanish to english (my real code is fine). However, I will try wit
rising_edge()...

---------------------------------------
Posted through http://www.FPGARelated.com
 
rising_edge() doesn't work...

I modified the .ucf file in order to test if the "pulsador" switch i
working by adding this line "NET "pulsador" LOC = "P11" ;" so when
switch on pulsador it should be turned on the P11 led but it doesn't ligh
up...

My new .ucf:

#PACE: Start of Constraints generated by PACE

NET "pulsador" CLOCK_DEDICATED_ROUTE = FALSE;
NET "act_reg3" CLOCK_DEDICATED_ROUTE = FALSE;

#PACE: Start of PACE I/O Pin Assignments
NET "an0" LOC = "E13" ;
NET "an3" LOC = "F14" ;
NET "an2" LOC = "G14" ;
NET "an1" LOC = "d14" ;


######################### 8 Led
###########################################
NET "mult_lec" LOC = "K12" ;
NET "mult_esc" LOC = "P14" ;
NET "mult_ret" LOC = "L12" ;
NET "mult_pc" LOC = "N14" ;
NET "reg_w" LOC = "P13" ;
NET "call_w" LOC = "N12" ;
NET "sel_alu" LOC = "P12" ;
NET "pulsador" LOC = "P11" ;

NET "clk" LOC = "T9" ;
#Frecuencia de 50 MHz

###################################### AquĂ­ va el marcador
##########################################
NET "segmentos<6>" LOC = "E14" ;
NET "segmentos<5>" LOC = "G13" ;
NET "segmentos<4>" LOC = "N15" ;
NET "segmentos<3>" LOC = "P15" ;
NET "segmentos<2>" LOC = "R16" ;
NET "segmentos<1>" LOC = "F13" ;
NET "segmentos<0>" LOC = "N16" ;
NET "segmentos<7>" LOC = "P16" ;


####################################### Switche
###########################################
###### Indicar registro 1 #####
NET "act_reg1" LOC = "F12" ;
###### Indicar registro 2 #####
NET "act_reg2" LOC = "G12" ;
###### Indicar registro 2 #####
NET "act_reg3" LOC = "H14" ;
######### My button clock ############
NET "pulsador" LOC = "H13" ;


#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE

Hope you can help!

---------------------------------------
Posted through http://www.FPGARelated.com
 
tupadre wrote:
Hi to everyone!

This is my first message here so first of all thanks to everyone to let me
post here!

I have a homework, it consists on writing a processor and make it work in a
Spartan 3. I did the first but the second one is getting difficult. I just
want to show my profesor that processor is working well so I want to
generate a clock event with a button or switch just like here:
http://fpgawiki.dustingram.com/index.php?title=Button_Clock

My UCF is this one:

#PACE: Start of Constraints generated by PACE

NET "act_reg3" CLOCK_DEDICATED_ROUTE = FALSE;

#PACE: Start of PACE I/O Pin Assignments
NET "an0" LOC = "E13" ;
NET "an3" LOC = "F14" ;
NET "an2" LOC = "G14" ;
NET "an1" LOC = "d14" ;

#This is a button to simulate a clock
NET "simulated_clk" LOC = "M13" ;


######################### 8 Leds
###########################################
NET "mult_lec" LOC = "K12" ;
NET "mult_esc" LOC = "P14" ;
NET "mult_ret" LOC = "L12" ;
NET "mult_pc" LOC = "N14" ;
NET "reg_w" LOC = "P13" ;
NET "call_w" LOC = "N12" ;
NET "sel_alu" LOC = "P12" ;

#I use this for another thing
NET "clk" LOC = "T9" ;

###################################### Segments
##########################################
NET "segmentos<6>" LOC = "E14" ;
NET "segmentos<5>" LOC = "G13" ;
NET "segmentos<4>" LOC = "N15" ;
NET "segmentos<3>" LOC = "P15" ;
NET "segmentos<2>" LOC = "R16" ;
NET "segmentos<1>" LOC = "F13" ;
NET "segmentos<0>" LOC = "N16" ;
NET "segmentos<7>" LOC = "P16" ;


####################################### Switches
###########################################
NET "act_reg1" LOC = "F12" ;
NET "act_reg2" LOC = "G12" ;
NET "act_reg3" LOC = "H14" ;


#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE




-------------------------------------------------------------------

And here is a fragment of my processor:

----PC process
process(inicio,simulated_clk)

variable pc_out: std_logic_vector (15 downto 0);
variable pc_high : std_logic_vector(15 downto 0);
begin
--Si es la primera vez que se carga
if inicio='0' then
pc<="0000000000000000";
reg_ret<="0000000000000000";
pc_out:="0000000000000000";
--Se ha cargado mĂĄs veces
elsif simulated='1' and simulated_clk'event then
pc_out:=pc;

...
end process;


I don't know why it doesn't work. As I said I just want to simulate a clock
so to show my proffesor how the processor works step by step (instruction
by instruction).

Hope you can help. Thanks!

PD: Sorry for my poor English.



---------------------------------------
Posted through http://www.FPGARelated.com
You don't say exactly what doesn't work, but the obvious
problem with using a button for a clock is that if it is
a typical mechanical switch it will bounce, and then each
button press will generate many clocks to your circuit.

You need to debounce the switch in order to use it as
a clock.

-- Gabor
 
Ok, it didn't work because the 'start' port was always to 0 so th
processor couldn't start working :)

---------------------------------------
Posted through http://www.FPGARelated.com
 

Welcome to EDABoard.com

Sponsor

Back
Top