Bus interface & FSMs

J

Jason Berringer

Guest
A question to all who have written a bus interface. Is a finite state
machine the best way to implement a bus interface (e.g. ISA, PCI,
uController) or does it matter. I have examined a few and almost everyone is
a FSM. I haven't written any FSMs to date and was curious if there was a
benefit to using an FSM. Does it reduce the logic needed in the design, or
does it allow for a faster design? Any comments are appreciated.

I have done a few bus interfaces myself, but due to my lack of experience
with a FSM I have not their use in the applications.

Jason
 
If you mean computer programs, then no. I know of tools for designing
FSMs. But by analysis, I mean the methods I learned in college for
formally proving things like the functional equivalence of two different
machines and how to detect states that can be merged, etc.

I believe the book was, "Switching and Finite Automata Theory" by Zvi
Kohavi. It was pretty good for a text book teaching theory. It gave me
a very sound base for understanding FSM and related logic. But it was
not a practically oriented book. To just learn how to "get it done" I
am sure there are many better.


john wrote:
Hello Rick,

Can you advice me about analyzing tools for the FSM?
Click to expand...

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
john wrote:

Can you advice me about analyzing tools for the FSM?
Click to expand...
I use modelsim.

In vhdl, the synchronous process covers the
textbook state machine model, but this is a small
subset of the possible controllers that
you can model, test and synthesize.

-- Mike Treseler
 
Jason Berringer wrote:
A question to all who have written a bus interface. Is a finite state
machine the best way to implement a bus interface (e.g. ISA, PCI,
uController) or does it matter. I have examined a few and almost everyone is
a FSM. I haven't written any FSMs to date and was curious if there was a
benefit to using an FSM. Does it reduce the logic needed in the design, or
does it allow for a faster design? Any comments are appreciated.

I have done a few bus interfaces myself, but due to my lack of experience
with a FSM I have not their use in the applications.
Click to expand...
A FSM is just a systematic way to design synchronous control logic. The
use of bubble diagrams for illustrating the state transitions and the
outputs generated is very easily grasped and makes good documentation.
There are tools to design FSMs and if needed, it can be formally
analyzed. In general, they make for good, clean design. If you have
never designed one, find a good reference or one of the HDL FAQs and
read up.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
Hello Rick,

Can you advice me about analyzing tools for the FSM?

Thanks
john
rickman <spamgoeshere4@yahoo.com> wrote in message news:<417DDCE3.E9BF76F8@yahoo.com>...
Jason Berringer wrote:

A question to all who have written a bus interface. Is a finite state
machine the best way to implement a bus interface (e.g. ISA, PCI,
uController) or does it matter. I have examined a few and almost everyone is
a FSM. I haven't written any FSMs to date and was curious if there was a
benefit to using an FSM. Does it reduce the logic needed in the design, or
does it allow for a faster design? Any comments are appreciated.

I have done a few bus interfaces myself, but due to my lack of experience
with a FSM I have not their use in the applications.

A FSM is just a systematic way to design synchronous control logic. The
use of bubble diagrams for illustrating the state transitions and the
outputs generated is very easily grasped and makes good documentation.
There are tools to design FSMs and if needed, it can be formally
analyzed. In general, they make for good, clean design. If you have
never designed one, find a good reference or one of the HDL FAQs and
read up.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
Click to expand...
 
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