Bug in AUTOSENSE with Emacs + Verilog Mode

[Srinivasan Venkataramanan]

Hi,
I use the Verilog mode with Emacs from verilog.com, and am quite
happy with it. I found an issue with AUTOSENSE feature, has any one
faced it before? If so are there any fixed release available? Here is
a sample Verilog code to demonstrate the problem. Basically, AUTOSENSE
tends to include "local variables" within in a named always block into
sensitivity list. I have the following controls set (as I need them).

(set-variable (quote verilog-auto-sense-include-inputs) 1)
(set-variable (quote verilog-auto-sense-defines-constant) 0)

Thanks a lot in advance for any fix.
Srinivasan
P.S. if you reply by e-mail, please use srinivasan.venkataramanan AT
intel DOT com - Thanks

module auto();
reg a,b;

always @(/*AUTOSENSE*/b or i) // I didn't expect to get "i" in
AUTOSENSE result
begin : label
integer i, j;

for (i=0; i<= 3; i = i + 1)
vec = b;
end

endmodule

 

[Srinivasan Venkataramanan]

Sorry to reply to my own posting, through an e-mail (Thanks to Michael) I
learnt that verilog-mode Version 3.61 fixes this issue.

Thanks,
Srini

"Srinivasan Venkataramanan" <srinivasan_v@india.com> wrote in message
news:84245291.0406090835.7802b846@posting.google.com...

Hi,
I use the Verilog mode with Emacs from verilog.com, and am quite
happy with it. I found an issue with AUTOSENSE feature, has any one
faced it before? If so are there any fixed release available? Here is
a sample Verilog code to demonstrate the problem. Basically, AUTOSENSE
tends to include "local variables" within in a named always block into
sensitivity list. I have the following controls set (as I need them).

(set-variable (quote verilog-auto-sense-include-inputs) 1)
(set-variable (quote verilog-auto-sense-defines-constant) 0)

Thanks a lot in advance for any fix.
Srinivasan
P.S. if you reply by e-mail, please use srinivasan.venkataramanan AT
intel DOT com - Thanks

module auto();
reg a,b;

always @(/*AUTOSENSE*/b or i) // I didn't expect to get "i" in
AUTOSENSE result
begin : label
integer i, j;

for (i=0; i<= 3; i = i + 1)
vec = b;
end

endmodule