S
sundar
Guest
Hi,
I am doing AC 97 audio interface to our project.We are using Xilinx
Microblaze
softprocessor core.This processor has two buses 1.LMB (for accessing
internal memory)2.OPB(External peripherals are attached to this).I
planned to use opencore AC 97 controller (verilog code)which has
Wishbone interface.I have to interface this with OPB bus.I want to
know whethere anyone worked on this already?Is there any bridge
available for this or is there any example bridge design between any
other buses?
Thanks for everything...
I am doing AC 97 audio interface to our project.We are using Xilinx
Microblaze
softprocessor core.This processor has two buses 1.LMB (for accessing
internal memory)2.OPB(External peripherals are attached to this).I
planned to use opencore AC 97 controller (verilog code)which has
Wishbone interface.I have to interface this with OPB bus.I want to
know whethere anyone worked on this already?Is there any bridge
available for this or is there any example bridge design between any
other buses?
Thanks for everything...