Books and Documentation

[Markus Fras]

Hello everybody!

For a new project we are starting with Verilog, maybe also
SystemVerilog. Do You have some advice for books offering an
introduction (for the beginning), an advanced description (for details)
and maybe also some coding style or cookbook?
And could You recommend some web-pages to find information?

Thank You very much,

Markus Fras

 

[Mike Treseler]

Markus Fras wrote:

For a new project we are starting with Verilog, maybe also
SystemVerilog. Do You have some advice for books offering an
introduction (for the beginning), an advanced description (for details)
and maybe also some coding style or cookbook?
And could You recommend some web-pages to find information?

When I have to write verilog, I do it vhdl-style like this
http://home.comcast.net/~mike_treseler/div10.v
http://home.comcast.net/~mike_treseler/div10.pdf

If I were taking on a new verilog project
I would evaluate MyHDL as a verilog generator before taking on
the expense and mind-bending-ness of SystemVerilog.

-- Mike Treseler

 

[Ajeetha (www.noveldv.com)]

Hi Markus,
Well quite a bit of eco system is around SV as of today.. It
depends on what you want to do with it - better RTL design, add
assertions, model higher level testbenches etc. Some of the links are:

www.noveldv.com
www.systemverilog.us
www.project-veripage.com
www.synopsys.com/systemverilog
www.mentor.com
www.cdnusers.org
www.doulos.com

Books
---------
SV For Design by Stuart Sutherland
SVA Handbook (www.noveldv.com)
SV for Verification, Chris Spear (chris.spear.net)
WTB using SystemVerilog (www.verificationguild.com)

HTH
Ajeetha, CVC
www.noveldv.com