Book recommendations?

[Philipp Klaus Krause]

I'm looking for a good book or two on Verilog.

At this time, I am mostly interested in using Verilog for synthesis, but
of course, I'd want to write testbenches, too.
I'd prefer something that covers are rasonably current standard, such as
Verilog 2005, but noticed that many often-recommended books on Verilog
are older than that.

It has been a while since I've done anythingin hardware design, and I
anyway never got into Verilog very deep.

My background:
* Tried to get into VHDL a few times, but always gave up since I didn't
like the language.
* Used SystemC a bit about 12 years ago to design and simulate a FPU at RTL
* Used Verilog at RTL 11 years ago for a very simple design simulated in
Icarus Verilog and synthesized using Xilinx tools for a small CPLD.
* Used Verilog at RTL 10 years ago for a pipelined image decompressor
(synthesized for ASIC via Berkeley ABC, then simulated the result in
Icarus Verilog to look into the effects of process variations on timing)
* Reasonable knowledge of C and ÂľC.

Philipp

 

[Rick C]

On Saturday, November 23, 2019 at 9:07:39 AM UTC-5, Philipp Klaus Krause wrote:

I'm looking for a good book or two on Verilog.

At this time, I am mostly interested in using Verilog for synthesis, but
of course, I'd want to write testbenches, too.
I'd prefer something that covers are rasonably current standard, such as
Verilog 2005, but noticed that many often-recommended books on Verilog
are older than that.

It has been a while since I've done anythingin hardware design, and I
anyway never got into Verilog very deep.

My background:
* Tried to get into VHDL a few times, but always gave up since I didn't
like the language.
* Used SystemC a bit about 12 years ago to design and simulate a FPU at RTL
* Used Verilog at RTL 11 years ago for a very simple design simulated in
Icarus Verilog and synthesized using Xilinx tools for a small CPLD.
* Used Verilog at RTL 10 years ago for a pipelined image decompressor
(synthesized for ASIC via Berkeley ABC, then simulated the result in
Icarus Verilog to look into the effects of process variations on timing)
* Reasonable knowledge of C and ÂľC.

I've asked this same question a number of times and always got the same answer, there aren't really any good books on Verilog. lol

In particular, my concern is learning the pitfalls of the language. I know there are various assumptions that the language makes and if you aren't familiar with them, you won't get the logic you are looking for. I would expect a good book to cover these issues in detail so that you don't need to learn them on your own by making the mistakes.

This is avoided in VHDL since you aren't allowed to let the tools make assumptions for you. That's often what people don't like about the language, the fact that you must specify every nit, but it makes things unambiguous.

Given a knowledge of the Verilog language structure and syntax and these cautions, I'm pretty sure I can figure out the rest of it just fine.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[Philipp Klaus Krause]

Hmm, not many ansers so far.
Has anyone here read any of these three books that I'm currently
considering?

Bhasker: "Verilog HDL Synthesis, A Practical Primer" - Apparently an
older book (reviews mention 1998, so apparently the current 2018 reprint
is not a revised edition), but reviews look ok; not that expensive at
about 70 €.

Thomas: "The VerilogÂŽ Hardware Description Language" - also has good
reviews, but apparently a 2008 reprint of a 2002 book, so it predates
verilog 2005. At about 60 € not that expensive either.

Sutherland: "RTL Modeling with SystemVerilog for Simulation and
Synthesis: Using SystemVerilog for ASIC and FPGA Design" - current book,
claims to cover current standards. Reviews even better than the other
two books. Quite expensive at about 120 €.

Originally, I was looking for a book that uses the 2005 standard, as I
expect that I inted to use Icarus Verilog a lot, and apparently the 2005
standard is the latest supported by Icarus. But it seems the books cover
tend to cover earlier or later standards.

 

[Gabor]

On Tuesday, 11/26/2019 4:03 AM, Philipp Klaus Krause wrote:

Hmm, not many ansers so far.
Has anyone here read any of these three books that I'm currently
considering?

Bhasker: "Verilog HDL Synthesis, A Practical Primer" - Apparently an
older book (reviews mention 1998, so apparently the current 2018 reprint
is not a revised edition), but reviews look ok; not that expensive at
about 70 €.

Thomas: "The VerilogÂŽ Hardware Description Language" - also has good
reviews, but apparently a 2008 reprint of a 2002 book, so it predates
verilog 2005. At about 60 € not that expensive either.

Sutherland: "RTL Modeling with SystemVerilog for Simulation and
Synthesis: Using SystemVerilog for ASIC and FPGA Design" - current book,
claims to cover current standards. Reviews even better than the other
two books. Quite expensive at about 120 €.

Originally, I was looking for a book that uses the 2005 standard, as I
expect that I inted to use Icarus Verilog a lot, and apparently the 2005
standard is the latest supported by Icarus. But it seems the books cover
tend to cover earlier or later standards.

I have an older version of Thomas (& Moorby) and as I recall it was
mostly a description of Verilog 95. That being said, it was a better
read than most such books and I learned a lot by reading it cover to
cover when I was just getting started with Verilog. The best book for
you may depend on how much you already know about logic design and HDLs
in general. Nowadays I generally just use my Doulos Golden Reference to
look up things I don't use too often and need to get the correct syntax.
That reference is also useful in that it shows examples and "gotchas."

I'm not familiar with Verilog 2005. Most of the tools I use support
Verilog up to 2001, or else SystemVerilog. So I can't comment on a book
or reference for Verilog 2005.

--
Gabor

--
Gabor

 

[Philipp Klaus Krause]

Am 27.11.19 um 04:44 schrieb Gabor:

I have an older version of Thomas (& Moorby) and as I recall it was
mostly a description of Verilog 95.  That being said, it was a better
read than most such books and I learned a lot by reading it cover to
cover when I was just getting started with Verilog.  The best book for
you may depend on how much you already know about logic design and HDLs
in general.  Nowadays I generally just use my Doulos Golden Reference to
look up things I don't use too often and need to get the correct syntax.
 That reference is also useful in that it shows examples and "gotchas."

How about using the standard itself for reference? For C and Scheme, I
found the standard documents quite readable.

I'm not familiar with Verilog 2005.  Most of the tools I use support
Verilog up to 2001, or else SystemVerilog.  So I can't comment on a book
or reference for Verilog 2005.

Verilog 2005 seems to be the standard supported by current free tools,
such as Icarus for simulation and Yosys for sythesis.

Philipp

 

[Kevin Neilson]

On Tuesday, November 26, 2019 at 2:04:02 AM UTC-7, Philipp Klaus Krause wrote:

Hmm, not many ansers so far.
Has anyone here read any of these three books that I'm currently
considering?

Bhasker: "Verilog HDL Synthesis, A Practical Primer" - Apparently an
older book (reviews mention 1998, so apparently the current 2018 reprint
is not a revised edition), but reviews look ok; not that expensive at
about 70 €.

Thomas: "The VerilogÂŽ Hardware Description Language" - also has good
reviews, but apparently a 2008 reprint of a 2002 book, so it predates
verilog 2005. At about 60 € not that expensive either.

Sutherland: "RTL Modeling with SystemVerilog for Simulation and
Synthesis: Using SystemVerilog for ASIC and FPGA Design" - current book,
claims to cover current standards. Reviews even better than the other
two books. Quite expensive at about 120 €.

Originally, I was looking for a book that uses the 2005 standard, as I
expect that I inted to use Icarus Verilog a lot, and apparently the 2005
standard is the latest supported by Icarus. But it seems the books cover
tend to cover earlier or later standards.

Most of the books are bad. I remember not liking Bhasker and Thomas. Nor Palnitkar. The Sutherland book is probably decent, and the table of contents indicates it covers some Systemverilog features such as interfaces and packages. It looks like there is coverage of stuff you don't need, like gate-level modeling, but it appears to be minimal.

Many synthesizers allow some Systemverilog constructs now, such as interfaces. Many tools are startlingly retrograde. Unfortunately, I often can't even use Verilog-2005, because some customer will have some custom tool that won't parse anything from this century. Then they blame me for using bleeding-edge syntax codified fifteen or twenty years ago, which is about two centuries in tech-time. The ASIC tools are worse than FPGA tools (in terms of parsing), despite having the price of a low-end Stradivarius.