Book on CPU Design

[John]

Hello,
Can somebody please reccomend a good book for studying the design of
CPUs using VHDL (for implementation in an FPGA). An emphasis on RISC
CPUs is probably best due to the comlpexity of CISC designs (not good
for learning). I'm not looking for a book that is an introduction to
VHDL with a chapter devoted to the design of a simple CPU. I'm looking
for something that assumes that the reader has some experience with
VHDL but not with the design of a CPU.

Thanks

 

[Chao]

This is one link from our Professor.

http://users.etech.haw-hamburg.de/users/Schwarz/En/Publications/LinkPage/Sample.html
Take a look at chapter 8.

or

http://users.etech.haw-hamburg.de/users/Schwarz/En/Lecture/Wahlfach_RISC.html



TheCppMaster@aol.com (John) wrote in message news:<a25b4de5.0306281503.2916b2cc@posting.google.com>...

Hello,
Can somebody please reccomend a good book for studying the design of
CPUs using VHDL (for implementation in an FPGA). An emphasis on RISC
CPUs is probably best due to the comlpexity of CISC designs (not good
for learning). I'm not looking for a book that is an introduction to
VHDL with a chapter devoted to the design of a simple CPU. I'm looking
for something that assumes that the reader has some experience with
VHDL but not with the design of a CPU.

Thanks

 

[John]

This is one link from our Professor.
http://users.etech.haw-hamburg.de/users/Schwarz/En/Publications/LinkPage/Sample.html
http://users.etech.haw-hamburg.de/users/Schwarz/En/Lecture/Wahlfach_RISC.html

Thank you for trying to help but I can't understand most of it. I
don't know German well enough. I did look through some of the code,
but something in English would be much more helpful.

Thanks for your time.

 

[john jakson]

TheCppMaster@aol.com (John) wrote in message news:<a25b4de5.0307012109.45ae6e7d@posting.google.com>...

This is one link from our Professor.
http://users.etech.haw-hamburg.de/users/Schwarz/En/Publications/LinkPage/Sample.html
http://users.etech.haw-hamburg.de/users/Schwarz/En/Lecture/Wahlfach_RISC.html

Thank you for trying to help but I can't understand most of it. I
don't know German well enough. I did look through some of the code,
but something in English would be much more helpful.

Thanks for your time.

Of the top of head, from my 6 books on Verilog on my desk, 2 or 3
cover cpu design describing how to use behavioural v structural coding
and get into quite a few details of simple risc design, pipelining,
reg forwarding, caches etc. If you can handle reading some Verilog, it
should still apply to VHDL too. None of my VHDL books do the cpu
thing, but maybe google or amazon can help.

Verilog Digital Computer Design: Algorithms Into Hardware
by Mark Gordon Arnold 1999
This guy has alot to say about PDP8 and ARM architecture...

VLSI Chip Design With the Hardware Description Language Verilog:
An Introduction Based on a Large RISC Processor Design
by Ulrich Golze, Peter Blinzer, Elmar Cochlovius, Michael Schafers
1996
Describes the Toobsty? cpu built in out of date FPGA, but that doesn't
really matter.

HDL Chip Design
by Douglas J. Smith
This one will not give you a cpu text, but it is a highly reccomended
cookbook full of synthesizable examples of component blocks you might
build a cpu from in both languages, but you will still need a cpu
text. How about John Hennesy etc.