Guest
the following code is for bit oriented memory
it has two addresses one for column and the second for row array
iam trying to inject a SA0 fault at memory location '000' row '000'
column but still not sure about the sytnax
mem((address_row))(address_col)) -- it might be wrong
could you advice please
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity RAM is
Port ( CS : in STD_LOGIC;
WE : in STD_LOGIC;
OE : in STD_LOGIC;
address_row : in STD_LOGIC_VECTOR (3 downto 0);
data : inout STD_LOGIC;
address_col : in STD_LOGIC_VECTOR (3 downto 0));
Architecture behaviour of RAM is
Type RAM_array is array (0 to 7) of std_logic_vector (7 downto 0);
Begin
Process (address_row,address_col,Data,WE,OE,CS )
Variable mem: ram_array;
Begin
Data<= (others => Z);
if CS=0 then
if OE=0 then
Data <= mem((address_row)(address_col));
elsif WE=0 then
If address_row=000 and address_col=000
then
mem((address_col)(address_row))=0;
elsif mem((address_row))(address_col)):= Data;
End if;
End procegss;
End behaviour;
it has two addresses one for column and the second for row array
iam trying to inject a SA0 fault at memory location '000' row '000'
column but still not sure about the sytnax
mem((address_row))(address_col)) -- it might be wrong
could you advice please
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity RAM is
Port ( CS : in STD_LOGIC;
WE : in STD_LOGIC;
OE : in STD_LOGIC;
address_row : in STD_LOGIC_VECTOR (3 downto 0);
data : inout STD_LOGIC;
address_col : in STD_LOGIC_VECTOR (3 downto 0));
Architecture behaviour of RAM is
Type RAM_array is array (0 to 7) of std_logic_vector (7 downto 0);
Begin
Process (address_row,address_col,Data,WE,OE,CS )
Variable mem: ram_array;
Begin
Data<= (others => Z);
if CS=0 then
if OE=0 then
Data <= mem((address_row)(address_col));
elsif WE=0 then
If address_row=000 and address_col=000
then
mem((address_col)(address_row))=0;
elsif mem((address_row))(address_col)):= Data;
End if;
End procegss;
End behaviour;