Binary to BCD in VHDL

[NA]

Hello all.
I'm very new to VHDL and stuck with a simple task.
This code should convert binary number to BCD number using shift and add 3
algoritam
http://www.engr.udayton.edu/faculty/jloomis/ece314/notes/devices/binary_to_BCD/bin_to_BCD.html

After this code executes I always get "0000" in digit and unit :-(

You don't have to analyze the whole code, just tell me what is generally
wrong. Thank you people!

variable temp: bit_vector(7 downto 0) := "00011000"; --24 (10)
variable unit: bit_vector(3 downto 0) := "0000";
variable digit: bit_vector(3 downto 0):= "0000";
begin
for i in 0 to 7 loop
digit := digit sll 1;
digit(0) := unit(3);
unit := unit sll 1;
unit(0) := temp(7);
temp := temp sll 1;
--This is the part where I add 3, is there any other way? It must work
on FPGA
case digit is
when "0101" => digit := "1000";
when "0110" => digit := "1001";
when "0111" => digit := "1010";
when "1000" => digit := "1011";
when "1001" => digit := "1100";
when others => digit := digit;
end case;

case unit is
when "0101" => unit := "1000";
when "0110" => unit := "1001";
when "0111" => unit := "1010";
when "1000" => unit := "1011";
when "1001" => unit := "1100";
when others => unit := digit;
end case;
end loop;

 

[Michael Jorgensen]

I see two problems:

1) Third line from the bottom: "unit := digit" -> "unit := unit"
2) The web page talks about "hundreds" too. The line "digit := digit sll
1;" in your code seems to lose some bits.

-Michael.

 

[Frank Buss]

NA wrote:

--This is the part where I add 3, is there any other way? It must work
on FPGA

you could use a function to avoid code duplication, like I've used in my
adder example:

http://groups.google.com/group/comp.lang.vhdl/msg/32a9a02c2b2b838d

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

 

[NA]

Thank you both !