big FPGA

Guest
https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?
 
On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:

https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.
 
On 8/26/19 11:30 PM, jlarkin@highlandsniptechnology.com wrote:
https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

sweet baby jesus that a big mama jamma!
 
jlarkin@highlandsniptechnology.com wrote:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:

https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus
-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Based on the cell count:

VU13P FPGA Virtex UltraScale 3,780,000 Cells $88,766.64

VU19P 9M system logic cells

9e6/3780000 = 2.38

2.38 * $88,766.64 = $211,264

From the VU19P blurb:

"While this FPGA is tuned for ASIC/SoC emulation and prototyping, test and
measurement, it is also suited for applications such as compute,
networking, and aerospace & defense."

To paraphrase British admiral John Arbuthnot Fisher in a letter to
Churchill:

OMG

http://nymag.com/intelligencer/2012/08/letter-to-churchill-may-contain-
first-omg.html?imw=Y&gtm=top
 
On 8/26/19 11:35 PM, jlarkin@highlandsniptechnology.com wrote:
On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:


https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

$135k is my guess
 
On 8/26/19 11:35 PM, jlarkin@highlandsniptechnology.com wrote:
On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:


https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Next time they give me a nuclear attack submarine or interplanetary
spacecraft-size budget I'm going to put a couple of those in the thing.
 
On 2019/08/26 8:50 p.m., bitrex wrote:
On 8/26/19 11:30 PM, jlarkin@highlandsniptechnology.com wrote:

https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf


Any guess what this might cost?


sweet baby jesus that a big mama jamma!

Yes, it is a BFFPGA!

John ;-#)#
 
On 8/27/19 12:33 AM, Steve Wilson wrote:
jlarkin@highlandsniptechnology.com wrote:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:

https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus
-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Based on the cell count:

VU13P FPGA Virtex UltraScale 3,780,000 Cells $88,766.64

VU19P 9M system logic cells

9e6/3780000 = 2.38

2.38 * $88,766.64 = $211,264

From the VU19P blurb:

"While this FPGA is tuned for ASIC/SoC emulation and prototyping, test and
measurement, it is also suited for applications such as compute,
networking, and aerospace & defense."

"If you're seriously looking at buying this thing you know what it can
do and what you're gonna do with it why are we even writing this"

To paraphrase British admiral John Arbuthnot Fisher in a letter to
Churchill:

OMG

http://nymag.com/intelligencer/2012/08/letter-to-churchill-may-contain-
first-omg.html?imw=Y&gtm=top
 
On Tuesday, August 27, 2019 at 1:46:48 AM UTC-4, bitrex wrote:
On 8/27/19 12:33 AM, Steve Wilson wrote:
jlarkin@highlandsniptechnology.com wrote:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:

https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus
-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Based on the cell count:

VU13P FPGA Virtex UltraScale 3,780,000 Cells $88,766.64

VU19P 9M system logic cells

9e6/3780000 = 2.38

2.38 * $88,766.64 = $211,264

From the VU19P blurb:

"While this FPGA is tuned for ASIC/SoC emulation and prototyping, test and
measurement, it is also suited for applications such as compute,
networking, and aerospace & defense."

"If you're seriously looking at buying this thing you know what it can
do and what you're gonna do with it why are we even writing this"

Some years ago I worked for a telecom test equipment maker. They produced a piece of gear they expected to sell 10 of. They used a Xilinx chip that cost something like $10,000 (I believe the largest at the time), but sold the box for $100,000 or maybe it was $150,000. They only needed 10 or 20% of the FPGA at that time, but didn't want to limit future expansion.

What I want to know is how many of the VU19P on a wafer actually work? At some point the number of defects per feature have to be massively tiny for a chip to work. I think semiconductor processing is one of the miracles of the 20th century and it doesn't seem to be slowing down any in the first 20 years of the 21st.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209
 
On Tue, 27 Aug 2019 00:20:14 -0700, Rick C wrote:

On Tuesday, August 27, 2019 at 1:46:48 AM UTC-4, bitrex wrote:
On 8/27/19 12:33 AM, Steve Wilson wrote:
jlarkin@highlandsniptechnology.com wrote:

On Mon, 26 Aug 2019 20:30:35 -0700,
jlarkin@highlandsniptechnology.com wrote:

https://www.xilinx.com/publications/product-briefs/virtex-
ultrascale-plus
-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Based on the cell count:

VU13P FPGA Virtex UltraScale 3,780,000 Cells $88,766.64

VU19P 9M system logic cells

9e6/3780000 = 2.38

2.38 * $88,766.64 = $211,264

From the VU19P blurb:

"While this FPGA is tuned for ASIC/SoC emulation and prototyping,
test and measurement, it is also suited for applications such as
compute, networking, and aerospace & defense."

"If you're seriously looking at buying this thing you know what it can
do and what you're gonna do with it why are we even writing this"

Some years ago I worked for a telecom test equipment maker. They
produced a piece of gear they expected to sell 10 of. They used a
Xilinx chip that cost something like $10,000 (I believe the largest at
the time), but sold the box for $100,000 or maybe it was $150,000. They
only needed 10 or 20% of the FPGA at that time, but didn't want to limit
future expansion.

What I want to know is how many of the VU19P on a wafer actually work?
At some point the number of defects per feature have to be massively
tiny for a chip to work. I think semiconductor processing is one of the
miracles of the 20th century and it doesn't seem to be slowing down any
in the first 20 years of the 21st.

It's four chiplets on an interposer. Xilinx have been using this
approach to improve yield and reduce NRE for some years. These are new
chiplets though, and (AFAIK) the largest chiplets used by Xilinx.

Regards,
Allan
 
On Tuesday, August 27, 2019 at 10:26:07 AM UTC-4, Allan Herriman wrote:
On Tue, 27 Aug 2019 00:20:14 -0700, Rick C wrote:

On Tuesday, August 27, 2019 at 1:46:48 AM UTC-4, bitrex wrote:
On 8/27/19 12:33 AM, Steve Wilson wrote:
jlarkin@highlandsniptechnology.com wrote:

On Mon, 26 Aug 2019 20:30:35 -0700,
jlarkin@highlandsniptechnology.com wrote:

https://www.xilinx.com/publications/product-briefs/virtex-
ultrascale-plus
-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Based on the cell count:

VU13P FPGA Virtex UltraScale 3,780,000 Cells $88,766.64

VU19P 9M system logic cells

9e6/3780000 = 2.38

2.38 * $88,766.64 = $211,264

From the VU19P blurb:

"While this FPGA is tuned for ASIC/SoC emulation and prototyping,
test and measurement, it is also suited for applications such as
compute, networking, and aerospace & defense."

"If you're seriously looking at buying this thing you know what it can
do and what you're gonna do with it why are we even writing this"

Some years ago I worked for a telecom test equipment maker. They
produced a piece of gear they expected to sell 10 of. They used a
Xilinx chip that cost something like $10,000 (I believe the largest at
the time), but sold the box for $100,000 or maybe it was $150,000. They
only needed 10 or 20% of the FPGA at that time, but didn't want to limit
future expansion.

What I want to know is how many of the VU19P on a wafer actually work?
At some point the number of defects per feature have to be massively
tiny for a chip to work. I think semiconductor processing is one of the
miracles of the 20th century and it doesn't seem to be slowing down any
in the first 20 years of the 21st.


It's four chiplets on an interposer. Xilinx have been using this
approach to improve yield and reduce NRE for some years. These are new
chiplets though, and (AFAIK) the largest chiplets used by Xilinx.

I expect there are significant limitations in signals between the chiplets. Do they treat the design as four separate chips or does the software lump the design together and just treat the interposer as a really slow interconnect?

--

Rick C.

+ Get 1,000 miles of free Supercharging
+ Tesla referral code - https://ts.la/richard11209
 
On Tue, 27 Aug 2019 07:50:14 -0700, Rick C wrote:

On Tuesday, August 27, 2019 at 10:26:07 AM UTC-4, Allan Herriman wrote:
On Tue, 27 Aug 2019 00:20:14 -0700, Rick C wrote:

On Tuesday, August 27, 2019 at 1:46:48 AM UTC-4, bitrex wrote:
On 8/27/19 12:33 AM, Steve Wilson wrote:
jlarkin@highlandsniptechnology.com wrote:

On Mon, 26 Aug 2019 20:30:35 -0700,
jlarkin@highlandsniptechnology.com wrote:

https://www.xilinx.com/publications/product-briefs/virtex-
ultrascale-plus
-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

Based on the cell count:

VU13P FPGA Virtex UltraScale 3,780,000 Cells $88,766.64

VU19P 9M system logic cells

9e6/3780000 = 2.38

2.38 * $88,766.64 = $211,264

From the VU19P blurb:

"While this FPGA is tuned for ASIC/SoC emulation and prototyping,
test and measurement, it is also suited for applications such as
compute, networking, and aerospace & defense."

"If you're seriously looking at buying this thing you know what it
can do and what you're gonna do with it why are we even writing
this"

Some years ago I worked for a telecom test equipment maker. They
produced a piece of gear they expected to sell 10 of. They used a
Xilinx chip that cost something like $10,000 (I believe the largest
at the time), but sold the box for $100,000 or maybe it was $150,000.
They only needed 10 or 20% of the FPGA at that time, but didn't want
to limit future expansion.

What I want to know is how many of the VU19P on a wafer actually
work? At some point the number of defects per feature have to be
massively tiny for a chip to work. I think semiconductor processing
is one of the miracles of the 20th century and it doesn't seem to be
slowing down any in the first 20 years of the 21st.


It's four chiplets on an interposer. Xilinx have been using this
approach to improve yield and reduce NRE for some years. These are new
chiplets though, and (AFAIK) the largest chiplets used by Xilinx.

I expect there are significant limitations in signals between the
chiplets. Do they treat the design as four separate chips or does the
software lump the design together and just treat the interposer as a
really slow interconnect?

If it's anything like the other multi-dice parts from Xilinx that I've
used, the designer can treat it as one big fabric, without needing to
worry about the interposer (much) at all.

One can also instantiate FF in the interposer (known as Laguna registers)
if pushing the Fmax limits. (These have to be instantiated; the tool
won't infer them.) I haven't needed to do that (yet).

Allan
 
tirsdag den 27. august 2019 kl. 18.13.46 UTC+2 skrev John Devereux:
jlarkin@highlandsniptechnology.com writes:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:


https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

That's the one-off price. I am sure they come down a bit if you buy a
full reel :)

I think they come in trays :p
 
On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:

>Any guess what this might cost?

It might be one of those "If you need to ask..." situations.

--
RoRo
 
jlarkin@highlandsniptechnology.com writes:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:


https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

That's the one-off price. I am sure they come down a bit if you buy a
full reel :)



--

John Devereux
 
On Tue, 27 Aug 2019 18:08:47 +0200, Robert Roland <fake@ddress.no>
wrote:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:

Any guess what this might cost?

It might be one of those "If you need to ask..." situations.

You guys are paying way too much for these.
I found 1 in stock for ONLY $77000 !

https://www.avnet.com/shop/us/products/xilinx/xcvu13p-3fhga2104e-3074457345634104171?CMP=EMA_OemsTrade_inventoryfeed_VSE
 
On Tuesday, August 27, 2019 at 12:13:46 PM UTC-4, John Devereux wrote:
jlarkin@highlandsniptechnology.com writes:

On Mon, 26 Aug 2019 20:30:35 -0700, jlarkin@highlandsniptechnology.com
wrote:


https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Digikey shows the smaller VU13p for $88,766.64.

That's the one-off price. I am sure they come down a bit if you buy a
full reel :)

Lol, they were going to use it in the next gen Fitbit, but they don't want to use the required fine geometry on the PCB because of costs.

--

Rick C.

-- Get 1,000 miles of free Supercharging
-- Tesla referral code - https://ts.la/richard11209
 
On Monday, August 26, 2019 at 8:30:43 PM UTC-7, jla...@highlandsniptechnology.com wrote:
https://www.xilinx.com/publications/product-briefs/virtex-ultrascale-plus-vu19p-product-brief.pdf

Any guess what this might cost?

Nine MILLION logic cells? That's how you emulate a Cray-1...
....in clusters of twenty

They'd have to leave out the many tuned transmission-line delay elements, though.
 

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