Best method to find how many times a number goes into anothe

[weizbox]

Hello,

I have the number of a period of a squarewave signal thats 25:0 (prd),
and my constant of 50000000 (clk speed). What I want to do is derive
the number of pulses per second using my given value of "prd". Im
relativly new to Verilog so I eventually found out I cant just do "prf
<= 50000000 / prd;". Is there another wya to divide where you can do
something like this? As well, any other ideas for getting the pulses
per second from these two numbers?

Thank you for your time,
-Mark

 

[John_H]

"weizbox" <mwiesbock@gmail.com> wrote in message
news:335c6753.0410141020.232b1ddd@posting.google.com...

Hello,

I have the number of a period of a squarewave signal thats 25:0 (prd),
and my constant of 50000000 (clk speed). What I want to do is derive
the number of pulses per second using my given value of "prd". Im
relativly new to Verilog so I eventually found out I cant just do "prf
= 50000000 / prd;". Is there another wya to divide where you can do
something like this? As well, any other ideas for getting the pulses
per second from these two numbers?

Thank you for your time,
-Mark

Have a counter that counts the pulses.
Have a second counter that counts through 1 second.
When the second counter hits 1 second, transfer the pulse count to a holding
register and clear the count.

For the second counter, a countdown is easier; when the registered value
goes negative, load the counter with clk_speed-2.

Beware the timing problems crossing between two clock domains. A clean way
to work is to detect the rising pulse edge in the 50MHz clock domain and use
this edge as the pulse counter increment.

 

[weizbox]

Have a counter that counts the pulses.
Have a second counter that counts through 1 second.
When the second counter hits 1 second, transfer the pulse count to a holding
register and clear the count.

For the second counter, a countdown is easier; when the registered value
goes negative, load the counter with clk_speed-2.

Beware the timing problems crossing between two clock domains. A clean way
to work is to detect the rising pulse edge in the 50MHz clock domain and use
this edge as the pulse counter increment.

John,

This, I have already done, but what Im working with now is multiple
signals coming into one line and need to seperate them. All that I am
getting in the end is the time between one certain pulse and one that
matches the relativly same amplitude and pulse width. The counter
works well with one, but I cant set it up for multiple signals. Any
ideas?

-Mark

 

[weizbox]

John,

What I ended up doing is instead of trying to figure out the prf, I
just left it as a 16-bit period value for me to transfer over rs-232
in LabView, and from there just take care of the math to get the prf
for display purposes. 8bit was too low for me to use anyhow, not
enough resolution for the span that I wanted. Thanks for the insight!

-Mark