Avnet Xilinx Virtex II Development Board - getting started

[mintchoco]

I have the Xilinx Virtex II Development Board sitting in front of me,
and I am completely lost and need to get started soon. I have never
worked with Xilinx FPGAs, so maybe some of you can share your
expertise.

The board comes only with the power-adaptor for the System ACE module.

Questions:
- How do I program the device?
- Is it through the System ACE?
- What cables do I need?
- Where do these plug into?

Any other tips on getting stared, I'm kind of lost.

Thanks in advance.

 

[Martin Euredjian]

Read this first:
http://www.xilinx.com/univ/beginnersbookjune2003ver2.pdf

You need to read through the VirtexII data sheet:
http://direct.xilinx.com/bvdocs/publications/ds031.pdf

and user guide:
http://direct.xilinx.com/bvdocs/userguides/ug002.pdf

Then move on to the development system manuals:
http://toolbox.xilinx.com/docsan/xilinx6/books/manuals.pdf

probably get started with this one:
http://toolbox.xilinx.com/docsan/xilinx6/books/docs/dev/dev.pdf

You'll find answers to your many questions in these documents. I know, it's
a lot of material. Trust me, if you don't put in the work now you'll pay
for it one way or the other later on.


I've never used System ACE. Did you get a JTAG cable? Get the parallel
cable IV. I'm assuming you have ISE6.1i or WebPACK. Does your distributor
have FAE's that can help? Call them.

In general terms, you have a fairly steep learning curve in front of you.
Read the above. It might give you a good overall perspective. Do you know
any HDL's? Have you worked with any other FPGA's? What's your background,
hardware or software?


--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
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"mintchoco" <yankiu_chan@yahoo.com> wrote in message
news:ad501ab3.0310070918.5f6710b4@posting.google.com...

I have the Xilinx Virtex II Development Board sitting in front of me,
and I am completely lost and need to get started soon. I have never
worked with Xilinx FPGAs, so maybe some of you can share your
expertise.

The board comes only with the power-adaptor for the System ACE module.

Questions:
- How do I program the device?
- Is it through the System ACE?
- What cables do I need?
- Where do these plug into?

Any other tips on getting stared, I'm kind of lost.

Thanks in advance.

 

[mintchoco]

Hi Martin,

Thanks for your reply.

I'm a University student. I'm very familiar with HDL, I've already
done my code in Verilog, and I just need to program the device so I
can test and make sure my code is working. I'm actually very familiar
with Actel FPGAs, but never used Xilinx before. System ACE and boot
prom stuff is pretty new to me. The myriad of information on the
Xilinx website is overwhelming, and that is why I wasn't sure where to
start.

I'll take a look at those materials you've pointed to, but I've
already scanned through AVNET documentation that came with the board,
and it was not very clear what plugs into where and how to 'quickly'
get started.

Did you get a JTAG cable?
So once I get Parallel IV cable, that plugs from my parallel port to

JTAG directly? Is there a 'programmer' that I need? Also, I have ISE
installed.

 

[Martin Euredjian]

"mintchoco" wrote:

I'm a University student. I'm very familiar with HDL, I've already
done my code in Verilog, and I just need to program the device so I
can test and make sure my code is working. I'm actually very familiar
with Actel FPGAs, but never used Xilinx before. System ACE and boot
prom stuff is pretty new to me. The myriad of information on the
Xilinx website is overwhelming, and that is why I wasn't sure where to
start.

I'll take a look at those materials you've pointed to, but I've
already scanned through AVNET documentation that came with the board,
and it was not very clear what plugs into where and how to 'quickly'
get started.

Did you get a JTAG cable?
So once I get Parallel IV cable, that plugs from my parallel port to
JTAG directly? Is there a 'programmer' that I need? Also, I have ISE
installed.

OK, good. Then it sounds like it shouldn't be all that difficult for you to
get going.
Keep in mind that there are architectural differences between what you know
and a VirtexII.

Yes, the parallel cable IV (or III) for that matter, goes between the
parallel port of your PC and the JTAG port on the board. If you have the
small board with the XC2V40 it would be J100, next to the RS232 port on the
board itself (I just happen to have a small collection of dev boards).

There are several ways to program a Xilinx FPGA:
1- Master Serial
2- Slave Serial
3- Master SelectMAP (Parallel)
4- Slave SelectMAP (Parallel)
5- JTAG

You'll find details in the "Configuration" section of the User Guide I
pointed out to you.

Xilinx FPGA's have volatile configuration memory. Regardless of which
programming technique you use, if power goes out they wake-up without a
configuration. There is a hardware option to use battery backup to retain
configuration data as well. Check the docs.

So, if you don't use the battery option you either use FLASH, SystemACE or
other means of preserving and loading the bitstream during power-up (like a
microprocessor with separate storage). These various means of bistream
loading can use all of the above techniques to get the bistream loaded.
However, the first four are the most common.

The main difference between the serial and parallel loading methods is, of
course, speed. Parallel can reach clock rates of around 60MHz. With an
eight-bit bus you can load a 1 million gate FPGA real fast (only about 4
megabits required). Serial is probably a better option for a board with
more than one FPGA where you need to create a configuration chain and load
speed might not be crucial.

JTAG and Serial is what you can do with either parallel cable. They are
called "parallel" cables because of how they connect to your PC. There's a
programming module called "MultiLynx" which can also do Parallel SelectMAP
but it doesn't seem to be favored. This one connects to your PC via USB.
You'd think it'd be the better way to go, but the FAE's I've talked to did
not recommend it. Don't know why.

With both JTAG and Serial SelectMAP you use a program shipped with ISE
called IMPACT. Use the tools to synthesize, map, place and route your code.
IMPACT would then take your "*.bit" file and either program the FPGA
directly or an attached Xilinx FLASH chip which would, in turn, load the
FPGA to run your code.

I hope that gives you a better picture of what you are up against. The
board should have shipped with a couple of test bitstreams you could
practice loading.

Oh, yes, if you didn't know, you need to create a UCF file where you'd
assign your pins. Being that this is a development board, you don't want to
let the tools assign pins at random 'cause you don't know where they might
land. You don't need to edit the UCF file by hand, you can use the PACE
utility to help you define the pinout (I prefer editing by hand though).


--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Martin Euredjian

To send private email:
0_0_0_0_@pacbell.net
where
"0_0_0_0_" = "martineu"