K
kvaddina
Guest
Dear all,
I have a model. The Model is shown in the following link below.
http://www.aisl.cyd.liu.se/temp/image.jpg
It has an
1) 8-bit Adder
2) a Verilog-A Module
3) Some VPWLF Sources which take "files" as inputs.
Some facts:
1) I have to simulate it for 8, 12 and 16 bit adders.
2) So the number of VPWLF sources also change accordingly and so does
the Verilog-A modules.
Now what I need to do is automate the whole process of simulating this
Model (with varied bit adders) using spectre. To be frank I am not sure
whether its worth it. Do i really need to automate this model and
simulate it ? or I can just go about doing this manually. Which one is
simpler ?
I have some Idea that the Automation has to be done using Ocean
Scripting language and SKILL. But not sure exactly how I can go about
doing this.
Thanks in advance,
kvaddina.
I have a model. The Model is shown in the following link below.
http://www.aisl.cyd.liu.se/temp/image.jpg
It has an
1) 8-bit Adder
2) a Verilog-A Module
3) Some VPWLF Sources which take "files" as inputs.
Some facts:
1) I have to simulate it for 8, 12 and 16 bit adders.
2) So the number of VPWLF sources also change accordingly and so does
the Verilog-A modules.
Now what I need to do is automate the whole process of simulating this
Model (with varied bit adders) using spectre. To be frank I am not sure
whether its worth it. Do i really need to automate this model and
simulate it ? or I can just go about doing this manually. Which one is
simpler ?
I have some Idea that the Automation has to be done using Ocean
Scripting language and SKILL. But not sure exactly how I can go about
doing this.
Thanks in advance,
kvaddina.