Automating the Simulation Process.

K

kvaddina

Guest
Dear all,

I have a model. The Model is shown in the following link below.

http://www.aisl.cyd.liu.se/temp/image.jpg

It has an
1) 8-bit Adder
2) a Verilog-A Module
3) Some VPWLF Sources which take "files" as inputs.

Some facts:
1) I have to simulate it for 8, 12 and 16 bit adders.
2) So the number of VPWLF sources also change accordingly and so does
the Verilog-A modules.

Now what I need to do is automate the whole process of simulating this
Model (with varied bit adders) using spectre. To be frank I am not sure
whether its worth it. Do i really need to automate this model and
simulate it ? or I can just go about doing this manually. Which one is
simpler ?

I have some Idea that the Automation has to be done using Ocean
Scripting language and SKILL. But not sure exactly how I can go about
doing this.

Thanks in advance,
kvaddina.
 
ThankYou very much for your Replies Stephane and Fogh.

Well, I forgot to add a point. Not only that I need to Simulate the
whole Model with an Adder (8,12 and 16 bits) but also I have to
simulate it for Multiplier and Divider (both 8, 12 and 16 bits) as
well. So now the number of cases for me would be 9 or probably more if
I intend to do the combinations of Adders, Multipliers and Dividers.

Some Facts:

1) Extracting data/Interpreting data will be done by my Verilog-A
Module.

2) I am NOT going to Simulate my Model for all corners, temperatures,
supply conditions or extracted views etc...

3) I will be changing my Circuit topology. That is, the number of PWL
Files/Sources changes with every simulation but they are CONSTANT for a
particular simulation. so does the Verilog-A module and the Design
(Adder, Multiplier, Divider or a combination of them).

What I want to Do:

1) Simulate my Model shown in the picture and as explained above (The
number of such models that I need to simulate will be 9 or more). So
the Number of VPWLF sources changes with every simulation so does the
Verilog-A module. So I strongly believe that I need to automate this
process of Simulation. Since doing this manually would be a tedious
task. I am looking for suggestions from you in what way I can go about
doing this automation.

"Working at File level" as suggested by Fogh seems interesting. Will
this be feasible with the new facts that have I put in this post ?

Thanks and Regards,
Kvaddina.
 
Any one out there who could comment on my post ?? Thanks in advance.

Kvaddina.
 
Thanks a lot Stephane. I am working on your inputs.

Regards,
Kvaddina.
 

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