Auto generation of memory files

[Paul Solomon]

Cross-posted from comp.arch.fpga

"Paul Solomon" <psolomon@tpg.com.au> wrote in message
news:42f1abf0$1@dnews.tpgi.com.au...

Hi,

I was wanting to know if there was a way to auto-generate a mif or hexout
file in quartus (or in general verilog) based on the set parameters in a
verilog file?

The application is for a NCO function that used a memory lookup (for sin
table) approach rather that cordic. The sin table can be auto generated by
a perl script that I can write in which I can manually set the memory
depth and amplitude resolution (which are parameters of the NCO) however I
would like the module to allow the end user to set an arbitrary bit width
and phase angle width and at synthesis time have a script or some other
clever code generate the required memory file for me.

If anyone has any ideas how to achieve this kind of trickery I would
apreciate the advise.

Regards

Paul Solomon

Or at the very least, if there was a way to select a memory file which is
set in a

defparam blah.init_file = "sin_lut_32_16.mif";

further up in the file there is a parameter A = 32, B = 16; etc so it would
be nice to be able to do something like...

defparam blah.init_file = "sin_lut_$(PARAMETER_A)_$(PARAMETER_B).mif";

is there any form of string substitution such as above available in verilog?

Regards,

Paul Solomon

 

If your tools support the Verilog-2001 file I/O extensions, you can use
$swrite to build a string to use as a filename. You would have to
create this filename in a variable at runtime, not in a parameter.

For example

reg [80*8:1] filename;
....
$swrite(filename, "sin_lut%d_%d.mif", A, B);
file = $fopen(filename);