asynchronous flipflop in PLD?

[Blackie Beard]

Here's one I've had problems with in the past, and never have
gotten a straight answer on...

I need to have an asynchronous output that toggles on with
one signal edge (not the clock), and stays on until another
signal (can be clocked reg output) goes away. Example
below with two such flops which are mutually exclusive:

assign #1 aout1 = ain1 & ~aout2 | hold & aout1;
assign #1 aout2 = ain2 & ~aout1 | hold & aout2;

When "hold" drops out, the output is supposed to drop.

In simulation this only works because of the #1. But when
synthesized for PLD, the #1 is ignored, and optimization is
hosing my flops. One flop is always on, the other is always
off. Yes, I'm stupid, I can't even make a flipflop. Although
this may not technically be a flipflop.

Perhaps there is some directive I'm not familiar with. I don't
want to have to do gates because I'm in Altera and those
LUT's could get messy.

Thanks,
BB

 

[Scott Frazer]

Blackie Beard wrote:

It would probably be better for me to describe the problem I'm trying
to solve, than for me to try to describe a solution that I can't get to
work right.

My device needs to sit in between two units with a bidirectional signal
between them. When I sense one unit talking, it's input into my PLD
will sense signal going low, at which point, without any clock delay,
I need to drive the other device with same signal. Therefore I am trying
to create two mutually exclusive output enables (oen's). They can both
be off, but they can't both be on simultaneously. And what it appears
is happening is that synthesis is hosing my combinatorial loop, which
I suppose is it's job, but Quartus gives no warning about it. On the
PLD board it appears that both oen's are on simultaneously as a
result of whatever optimization sythesis performed.

I'm pretty sure there is some solution using two SRFF's, but the
Altera SRFF macro has clock input, and I've heard legend that it's
output is synchronous (which would make it useless, although I
still have to investigate).

I've heard it suggested in the past that I can break the loop by
running feedback out through pin, connecting via PCB trace, and
then back into PLD. I wonder whether you've heard of this?

Holy cow that sounds too complicated! Why aren't you simply wiring the signal
directly between the units and keep the PLD out of the way? It sounds like
they are supposed to work that way. If you need the signal inside your device
for other functions just tap it off and use it as an input. If you are
trying to fix some (say) distance problem by repowering the signal there are
better analog methods of doing it.

My $0.02,
Scott

 

[Blackie Beard]

"Scott Frazer" <frazers67@yahoo.com> wrote in message
news:cck8bm$h26$1@ausnews.austin.ibm.com...

Blackie Beard wrote:

It would probably be better for me to describe the problem I'm trying
to solve, than for me to try to describe a solution that I can't get to
work right.

My device needs to sit in between two units with a bidirectional signal
between them. When I sense one unit talking, it's input into my PLD
will sense signal going low, at which point, without any clock delay,
I need to drive the other device with same signal. Therefore I am
trying
to create two mutually exclusive output enables (oen's). They can both
be off, but they can't both be on simultaneously. And what it appears
is happening is that synthesis is hosing my combinatorial loop, which
I suppose is it's job, but Quartus gives no warning about it. On the
PLD board it appears that both oen's are on simultaneously as a
result of whatever optimization sythesis performed.

I'm pretty sure there is some solution using two SRFF's, but the
Altera SRFF macro has clock input, and I've heard legend that it's
output is synchronous (which would make it useless, although I
still have to investigate).

I've heard it suggested in the past that I can break the loop by
running feedback out through pin, connecting via PCB trace, and
then back into PLD. I wonder whether you've heard of this?


Holy cow that sounds too complicated! Why aren't you simply wiring the
signal
directly between the units and keep the PLD out of the way? It sounds
like
they are supposed to work that way. If you need the signal inside your
device
for other functions just tap it off and use it as an input. If you are
trying to fix some (say) distance problem by repowering the signal there
are
better analog methods of doing it.

My $0.02,
Scott

Good point. But it's because my function needs to be able to "cut in" and
be a second slave in a non-conventional manner. : )

Thanks much, I'm going to first look into Altera LE structure and see if
there
isn't some slick way to just instantiate a couple to do the job. Who knows,
maybe it will work!

BB