asynchronous design

A

Amir

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Is there any good books on asynchronous design in VHDL?

Thank you.
 
Do you mean designing with multiple clocks? I don't think there are any
books written on just this topic, but some books have chaptes about crossing
clock domains. Also, several days ago in the "Should I worry about
metastability" thread on comp.arch.fpga Paul Leventis pointed to this great
paper on the subject:
http://www.sunburst-design.com/papers/CummingsSNUG2001SJ_AsyncClk_rev1_1.pdf

/Mikhail

"Amir" <amir@quickclic.net> wrote in message
news:reydnX07rs0DqRuiXTWJhQ@edaptivity.com...
Is there any good books on asynchronous design in VHDL?

Thank you.
 
Google is your friend, searching for "asynchronous logic design" gives the
following result (of course more are shown), which could be used as a
starting point.

http://www.cs.man.ac.uk/async/

HTH.

Ansgar
--
Attention please, reply address is invalid, please remove "_xxx_" ro reply

"Amir" <amir@quickclic.net> schrieb im Newsbeitrag
news:reydnX07rs0DqRuiXTWJhQ@edaptivity.com...
Is there any good books on asynchronous design in VHDL?

Thank you.
 
Thanks for your help.

-Amir
"Amir" <amir@quickclic.net> wrote in message
news:reydnX07rs0DqRuiXTWJhQ@edaptivity.com...
Is there any good books on asynchronous design in VHDL?

Thank you.
 

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