Assura tolerances

[Jake]

Hello,

I'm attempting to run an LVS on a cell that contains a resistor and a
MOScap using IBM's CMOS6RF process. The results come back as
everything is fine except that the 'mSwitch' parameter of the resistor
in the schematic is 0 and in the layout is 1e-55. This is apparently
some kind of multiplicity parameter, and I clearly don't care about
this level of discrepancy. Would anybody happen to know how to tell
Assura to ignore these kinds of discrepancies?

Thanks,
Jake

 

[Andrew Beckett]

Jake wrote, on 10/04/10 19:39:

Hello,

I'm attempting to run an LVS on a cell that contains a resistor and a
MOScap using IBM's CMOS6RF process. The results come back as
everything is fine except that the 'mSwitch' parameter of the resistor
in the schematic is 0 and in the layout is 1e-55. This is apparently
some kind of multiplicity parameter, and I clearly don't care about
this level of discrepancy. Would anybody happen to know how to tell
Assura to ignore these kinds of discrepancies?

Thanks,
Jake

Hi Jake,

Often specific tolerances are coded into the LVS comparison rules - so it would
be worth taking a look at the LVS rules to see what is being done there. It's
relatively simple to understand these (they're just used to compare parameters
and combine devices and are separate from the extraction of the parameters in
the first place).

I am not familiar with the particular process you're using, so can't offer
anything other than generic advice. Maybe somebody else can give you some
specific pointers though.

Regards,

Andrew.

--
Andrew Beckett
Senior Solution Architect - Cadence Design Systems Ltd (UK)