array slices

[proudfeet]

anyone know how to assign 2 parts of an array to a component instantion port
in a testbench?

e.g.

foo => bar(8) & bar(3 downto 0);

the above, of course, can't be done due to the error "actual for formal foo
is not a globally static expression .. what to do? i can't use a in-between
signal, i.e. in_between <= bar(8) & bar(3 downto 0); then do : foo =>
in_between; .. because both foo and bar are bi-directional (types inout)

help?

 

[Egbert Molenkamp]

In the following example I assume that foo is has type std_logic_vector(4
downto 0)
foo(4)=>bar(8), foo(3 downto 0)=>bar(3 downto 0),

Egbert Molenkamp


"proudfeet" <steevo@qwest.net> wrote in message
news:ATseb.2113$J13.74664@news.uswest.net...

anyone know how to assign 2 parts of an array to a component instantion
port
in a testbench?

e.g.

foo => bar(8) & bar(3 downto 0);

the above, of course, can't be done due to the error "actual for formal
foo
is not a globally static expression .. what to do? i can't use a
in-between
signal, i.e. in_between <= bar(8) & bar(3 downto 0); then do : foo =
in_between; .. because both foo and bar are bi-directional (types inout)

help?