ARM + FPGA CPU Module running Yocto Linux?

A

A.P.Richelieu

Guest
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP
 
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP
Click to expand...

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


Rick C.

- Get 6 months of free supercharging
- Tesla referral code - https://ts.la/richard11209
 
onsdag den 30. januar 2019 kl. 18.13.34 UTC+1 skrev A.P.Richelieu:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP
Click to expand...

why not Zynq? it has everything you ask for and the same ARM-9 as the NXP
 
Den 2019-01-30 kl. 18:44, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 18.13.34 UTC+1 skrev A.P.Richelieu:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

why not Zynq? it has everything you ask for and the same ARM-9 as the NXP
Click to expand...

Because it is way too expensive.

You can get a better ARM chip for $6-7 in 1k qty.
A Cyclone 10 FPGA is $8-9.
Can You get a Zynq for $14-16 in 1k volume?
Digikey shows one off pricing for the cheapest Zynq to be $46.
If they can give 40% discount at 1k, it is still $30 = 2x price.


Another thing is that the onboard peripherals generally suck.
At least when I looked at them the last time.
I do not care to waste my time on why.

This means that we have to spend time doing peripherals in the FPGA.
They need to be supported by Linux drivers.
We do not want to add that development effort.

AP
 
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?
Click to expand...

We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.

Ideally, the module would have a suitable connector that
can be used, or if not, it would be good to have a schematic
that can be used to design our own physical format.

Volume for the end product is 1k/year, but we expect the production
to be long lifed.

AP
Rick C.

- Get 6 months of free supercharging
- Tesla referral code - https://ts.la/richard11209
Click to expand...
 
On Wednesday, January 30, 2019 at 1:21:30 PM UTC-5, A.P.Richelieu wrote:
Den 2019-01-30 kl. 18:44, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 18.13.34 UTC+1 skrev A.P.Richelieu:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

====================
The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
====================> >> The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
====================> >> The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer)..
====================> >> Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

why not Zynq? it has everything you ask for and the same ARM-9 as the NXP


Because it is way too expensive.

You can get a better ARM chip for $6-7 in 1k qty.
A Cyclone 10 FPGA is $8-9.
Can You get a Zynq for $14-16 in 1k volume?
Digikey shows one off pricing for the cheapest Zynq to be $46.
If they can give 40% discount at 1k, it is still $30 = 2x price.


Another thing is that the onboard peripherals generally suck.
At least when I looked at them the last time.
I do not care to waste my time on why.

This means that we have to spend time doing peripherals in the FPGA.
They need to be supported by Linux drivers.
We do not want to add that development effort.
Click to expand...

It is hard to know what you really need and what you may have prematurely discounted from what you post above. You say you need peripherals with Linux drivers, but you didn't indicate much in your original post other than various peripherals you plan to mostly implement in the FPGA.

So even with the separate CPU and FPGA approach how can anyone recommend a solution when we don't know all the requirements?

One thing I do know is that the FPGA vendors will provide some amazingly good prices if you can commit to quantities they care about. They want to talk to you in person and are happy to do so. That's why Digikey doesn't have qty 1k pricing. Set up some lunch dates and let Xilinx and Intel take you to lunch. They are often happy to do that. They've done it with me.


Rick C.

+ Get 6 months of free supercharging
+ Tesla referral code - https://ts.la/richard11209
 
Den 2019-01-30 kl. 19:53, skrev Gerhard Hoffmann:
Am 30.01.19 um 19:21 schrieb A.P.Richelieu:
Den 2019-01-30 kl. 18:44, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 18.13.34 UTC+1 skrev A.P.Richelieu:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work


The BeagleBoneBlack has at least a 16 bit multiplexed data bus, even
when it shares pins with other stuff.
Click to expand...
There is also the integrated solution from Octavo Systems.
Beaglebone with eMMC and DDR3 SDRAM + Power in a 400 pin BGA.

Adding an FPGA to that, with a high speed bus: Yum, Yum...

AP
I'm looking into that because I want a FPGA that has support
for some JESDI204B lanes to connect to some contemporary ADCs and DACs.

And on-chip CPUs have been a royal pain from Power-PC to Picoblaze.
I like it when I know that at least my Linux runs stable, so bugs
must be in user land or the hardware - and not in my driver that
kills my ssh access.

It found it quite OK to run the time-critical stuff on a PRU and
just hand the Linux-ARM the time-decoupled data via shared buffers.
There is a C compiler for the PRUs in the standard BBB Linux distribution.

regards,
Gerhard
Click to expand...
 
onsdag den 30. januar 2019 kl. 19.28.43 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.
Click to expand...

if you only need a few for prototyping why does it matter if it
is stacked boards?
 
Den 2019-01-30 kl. 20:18, skrev Joe Chisolm:
On Wed, 30 Jan 2019 18:13:26 +0100, A.P.Richelieu wrote:

Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better * Microchip SAMA5 * Renesas
RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least * 128 MB RAM * 128 MB Flash.
Connector will have * 100 Mbps Ethernet * 12 x 10 Mbps SPI channels
(most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card * A few custom protocol LVDS channels =====================
The processor has to be connected to an FPGA on a suitable interface
providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the interface to
the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals of the
FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE, .addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution would
be appreciated.

Looking forward to ideas.

AP

Goggle cpu module with fpga
you will get lots of hits

A couple that might work
http://www.myirtech.com/list.asp?id=583
https://www.embeddedarm.com/products/TS-4740





Thanks, but the myirtech uses the Zync, and the TS-4740 uses a Marvell CPU.
Click to expand...

This might work:
http://teso.rs/arm-fpga-platforms.php

NXP ARM Cortex-A5 with Cortex-M controllers
and an 80 MHz memory bus to an Artix-7

The AM335x CPU on the Beagleon with an FPGA on a module would be better,
since that is a preferred chip.

AP
 
On Wed, 30 Jan 2019 18:13:26 +0100, A.P.Richelieu wrote:

Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better * Microchip SAMA5 * Renesas
RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least * 128 MB RAM * 128 MB Flash.
Connector will have * 100 Mbps Ethernet * 12 x 10 Mbps SPI channels
(most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card * A few custom protocol LVDS channels =====================
The processor has to be connected to an FPGA on a suitable interface
providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the interface to
the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals of the
FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE, .addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution would
be appreciated.

Looking forward to ideas.

AP
Click to expand...

Goggle cpu module with fpga
you will get lots of hits

A couple that might work
http://www.myirtech.com/list.asp?id=583
https://www.embeddedarm.com/products/TS-4740





--
Chisolm
Republic of Texas
 
Den 2019-01-30 kl. 19:49, skrev Theo:
A.P.Richelieu <aprichelieu@gmail.com> wrote:
You can get a better ARM chip for $6-7 in 1k qty.
A Cyclone 10 FPGA is $8-9.
Can You get a Zynq for $14-16 in 1k volume?
Digikey shows one off pricing for the cheapest Zynq to be $46.
If they can give 40% discount at 1k, it is still $30 = 2x price.

Bear in mind that on a daughterboard you have to pay for
ARM+FPGA+DRAM+storage+PCB+connectors+vendor profit.

If you're doing a Zynq/CycloneSoC you're paying for
Zynq+DRAM+storage

It's not immediately clear that you're going to win by buying a third-party
board, especially one where you want security of supply (so no random China
board).

I could see it swing towards the daughterboard approach if this means you
can get away with a cheaper PCB (no BGAs, DDR routing). I'm not sure if the
power supply arrangements would be simpler too.

Another thing is that the onboard peripherals generally suck.
At least when I looked at them the last time.
I do not care to waste my time on why.

You mean the hard peripherals (ethernet, USB, SD, etc), usually Synopsys IP
as found in other SoCs? Or the Xilinx/Intel soft peripherals?

This means that we have to spend time doing peripherals in the FPGA.
They need to be supported by Linux drivers.
We do not want to add that development effort.

AFAICS some of your requirements (100M ethernet, SD) will be hard logic on
Zynq or Cyclone. The others (12 SPI channels, 5 UARTs) will have to be soft
logic, at which point the driver situation is more or less the same
whichever platform you pick.

Theo
Click to expand...

You are trying to convince me to look at Zynq and SoC.
That is what I explicitly said I was not going to do.

AP
 
Am 30.01.19 um 19:21 schrieb A.P.Richelieu:
Den 2019-01-30 kl. 18:44, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 18.13.34 UTC+1 skrev A.P.Richelieu:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work
Click to expand...

The BeagleBoneBlack has at least a 16 bit multiplexed data bus, even
when it shares pins with other stuff.

I'm looking into that because I want a FPGA that has support
for some JESDI204B lanes to connect to some contemporary ADCs and DACs.

And on-chip CPUs have been a royal pain from Power-PC to Picoblaze.
I like it when I know that at least my Linux runs stable, so bugs
must be in user land or the hardware - and not in my driver that
kills my ssh access.

It found it quite OK to run the time-critical stuff on a PRU and
just hand the Linux-ARM the time-decoupled data via shared buffers.
There is a C compiler for the PRUs in the standard BBB Linux distribution.

regards,
Gerhard
 
Den 2019-01-30 kl. 19:29, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 1:21:30 PM UTC-5, A.P.Richelieu wrote:
Den 2019-01-30 kl. 18:44, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 18.13.34 UTC+1 skrev A.P.Richelieu:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

why not Zynq? it has everything you ask for and the same ARM-9 as the NXP


Because it is way too expensive.

You can get a better ARM chip for $6-7 in 1k qty.
A Cyclone 10 FPGA is $8-9.
Can You get a Zynq for $14-16 in 1k volume?
Digikey shows one off pricing for the cheapest Zynq to be $46.
If they can give 40% discount at 1k, it is still $30 = 2x price.


Another thing is that the onboard peripherals generally suck.
At least when I looked at them the last time.
I do not care to waste my time on why.

This means that we have to spend time doing peripherals in the FPGA.
They need to be supported by Linux drivers.
We do not want to add that development effort.


It is hard to know what you really need and what you may have prematurely discounted from what you post above. You say you need peripherals with Linux drivers, but you didn't indicate much in your original post other than various peripherals you plan to mostly implement in the FPGA.

So even with the separate CPU and FPGA approach how can anyone recommend a solution when we don't know all the requirements?

One thing I do know is that the FPGA vendors will provide some amazingly good prices if you can commit to quantities they care about. They want to talk to you in person and are happy to do so. That's why Digikey doesn't have qty 1k pricing. Set up some lunch dates and let Xilinx and Intel take you to lunch. They are often happy to do that. They've done it with me.
Click to expand...
We are using the Zynq in other places, so the decision has been made to
skip it for this project due to price, but mostly because of the periperals.

I have stated my needs.
=========================
A CPU + FPGA combination.
5-10 MB/s connection to the FPGA
80-100 FPGA I/O, some with LVDS.
Memory needs
An existing board with decent Linux support.
It should not be based on Zync or SoC.
The ARM chips should be from the vendors above.


Exactly what we intend to do with the FPGA is not something I can
comment. And it is not worthwhile to enter a discussion why a Zynq or
SoC should fit, that train has left.

An example of something that almost works is
https://www.embeddedarm.com/products/TS-4100

This has everything, except a slow interface to the FPGA.
The MACH series is a little small though.
A Cyclone 10 or Spartan 6 are probably the minimum
level FPGA we are looking for.

https://www.embeddedarm.com/products/TS-4740
Seems to have a nice interface, but the Marvell processor is a no,no.

AP

Rick C.

+ Get 6 months of free supercharging
+ Tesla referral code - https://ts.la/richard11209
Click to expand...
 
A.P.Richelieu <aprichelieu@gmail.com> wrote:
You can get a better ARM chip for $6-7 in 1k qty.
A Cyclone 10 FPGA is $8-9.
Can You get a Zynq for $14-16 in 1k volume?
Digikey shows one off pricing for the cheapest Zynq to be $46.
If they can give 40% discount at 1k, it is still $30 = 2x price.
Click to expand...

Bear in mind that on a daughterboard you have to pay for
ARM+FPGA+DRAM+storage+PCB+connectors+vendor profit.

If you're doing a Zynq/CycloneSoC you're paying for
Zynq+DRAM+storage

It's not immediately clear that you're going to win by buying a third-party
board, especially one where you want security of supply (so no random China
board).

I could see it swing towards the daughterboard approach if this means you
can get away with a cheaper PCB (no BGAs, DDR routing). I'm not sure if the
power supply arrangements would be simpler too.

Another thing is that the onboard peripherals generally suck.
At least when I looked at them the last time.
I do not care to waste my time on why.
Click to expand...

You mean the hard peripherals (ethernet, USB, SD, etc), usually Synopsys IP
as found in other SoCs? Or the Xilinx/Intel soft peripherals?

This means that we have to spend time doing peripherals in the FPGA.
They need to be supported by Linux drivers.
We do not want to add that development effort.
Click to expand...

AFAICS some of your requirements (100M ethernet, SD) will be hard logic on
Zynq or Cyclone. The others (12 SPI channels, 5 UARTs) will have to be soft
logic, at which point the driver situation is more or less the same
whichever platform you pick.

Theo
 
Den 2019-01-30 kl. 20:27, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 19.28.43 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.


if you only need a few for prototyping why does it matter if it
is stacked boards?
Click to expand...

It will be mounted on a low volume test board, to test the functionality
outside the module. There is a maximum height restriction.
The real motherboard can have a different module connector.

AP
 
onsdag den 30. januar 2019 kl. 20.35.51 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 20:27, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 19.28.43 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.


if you only need a few for prototyping why does it matter if it
is stacked boards?


It will be mounted on a low volume test board, to test the functionality
outside the module. There is a maximum height restriction.
The real motherboard can have a different module connector.
Click to expand...

if you are doing a board anyway just put the FPGA on that
 
Den 2019-01-30 kl. 21:05, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 20.35.51 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 20:27, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 19.28.43 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.


if you only need a few for prototyping why does it matter if it
is stacked boards?


It will be mounted on a low volume test board, to test the functionality
outside the module. There is a maximum height restriction.
The real motherboard can have a different module connector.

if you are doing a board anyway just put the FPGA on that
Click to expand...

Not going to happen.

Please everyone.
I know what I plan to do and I am not going to explain why.

I want a CPU module.
That CPU module has those restrictions I have mentioned.

That means
* no Zync
* No SoC
* no FPGA outside the module
* no CPU outside the module
* Not two PCBs
* No Marvell CPU, No CPU which is not delivered by NXP,TI, or MicroChip.
* No SPI interface between CPU and FPGA.
* Not anything that will deviate from what I described so far.

AP
 
onsdag den 30. januar 2019 kl. 21.33.14 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 21:05, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 20.35.51 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 20:27, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 19.28.43 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.


if you only need a few for prototyping why does it matter if it
is stacked boards?


It will be mounted on a low volume test board, to test the functionality
outside the module. There is a maximum height restriction.
The real motherboard can have a different module connector.

if you are doing a board anyway just put the FPGA on that


Not going to happen.

Please everyone.
I know what I plan to do and I am not going to explain why.
Click to expand...

so you are firmly committed to a plan that involves a board you can't
find and might not even exist

best of luck
 
On Wed, 30 Jan 2019 20:27:03 +0100, A.P.Richelieu wrote:

Den 2019-01-30 kl. 20:18, skrev Joe Chisolm:
On Wed, 30 Jan 2019 18:13:26 +0100, A.P.Richelieu wrote:

Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better * Microchip SAMA5 * Renesas
RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least * 128 MB RAM * 128 MB Flash.
Connector will have * 100 Mbps Ethernet * 12 x 10 Mbps SPI channels
(most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card * A few custom protocol LVDS channels =====================
The processor has to be connected to an FPGA on a suitable interface
providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the interface to
the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY
timer).
=====================
Preferably, the processor should be able to access the internals of
the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE, .addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution would
be appreciated.

Looking forward to ideas.

AP

Goggle cpu module with fpga you will get lots of hits

A couple that might work http://www.myirtech.com/list.asp?id=583
https://www.embeddedarm.com/products/TS-4740





Thanks, but the myirtech uses the Zync, and the TS-4740 uses a Marvell
CPU.

This might work:
http://teso.rs/arm-fpga-platforms.php

NXP ARM Cortex-A5 with Cortex-M controllers and an 80 MHz memory bus to
an Artix-7
Click to expand...

It will be interesting to see what they think "low cost" is. Please post
back here if you get a price from them.

The AM335x CPU on the Beagleon with an FPGA on a module would be better,
since that is a preferred chip.

AP
Click to expand...

--
Chisolm
Republic of Texas
 
Den 2019-01-30 kl. 22:31, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 21.33.14 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 21:05, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 20.35.51 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 20:27, skrev lasselangwadtchristensen@gmail.com:
onsdag den 30. januar 2019 kl. 19.28.43 UTC+1 skrev A.P.Richelieu:
Den 2019-01-30 kl. 18:28, skrev gnuarm.deletethisbit@gmail.com:
On Wednesday, January 30, 2019 at 12:13:34 PM UTC-5, A.P.Richelieu wrote:
Is there any ARM + FPGA CPU Module running linux using any of:

* NXP i.MX6/7/...
* Texas Instrument Sitara AM335x or better
* Microchip SAMA5
* Renesas RZ/xxx

It needs to be connected to a low price FPGA, Intel or Xilinx.

* Zynq or Intel SoC solutions need not apply.

Other vendors will be difficult to accept.

=====================

The CPU Module needs at least
* 128 MB RAM
* 128 MB Flash.
Connector will have
* 100 Mbps Ethernet
* 12 x 10 Mbps SPI channels (most will be implemented in the FPGA)
* 5 x 921,200 BAUD serial ports (some in FPGA perhaps)
* SD-Card
* A few custom protocol LVDS channels
=====================
The processor has to be connected to an FPGA on a suitable
interface providing 5-10 MB/second transfer rate.
The FPGA needs to have 80-100 free I/O, not including the
interface to the CPU to implement SPIs, UARTs and other custom signals
=====================
The CPU should be able to load the FPGA after reset.
Preferably right after loading the U-Boot (during the BOOTDELAY timer).
=====================
Preferably, the processor should be able to access the internals
of the FPGA like it was on the memory bus.

Putting the FPGA on a 16 bit memory interface will work

Some chip support a transparent mode where you do a memory read/write
which gets translated to a Quad SPI access, or a NAND flash controller
access.

I.E:
You can write to a register over SPI by:
FPGA_REGISTER = value;
instead of

spi_packet = {
.cmd = SPI_WRITE,
.addr = FPGA_REGISTER,
.size = sizeof(value),
.data = &value
}
spi_transfer(&spi_packet);


We plan to use Yocto for developing Linux, so any Yocto solution
would be appreciated.

Looking forward to ideas.

AP

I am not familiar with modules (i.e. boards) that contain an ARM and an FPGA unless they are in the same devices which you have an unstated reason to avoid. Care you share the rational for not using those obvious solutions?

You don't indicate what your outline size requirements are. Would you consider a daughter board mounted on something like a Beagle board? What sort of quantities would you be expecting to buy?


We will do a base board, for which we need a CPU+FPGA module, so no
adding two boards together.

We are looking for an existing board for some prototyping.
Not having someone design it for us. A few boards will be OK.


if you only need a few for prototyping why does it matter if it
is stacked boards?


It will be mounted on a low volume test board, to test the functionality
outside the module. There is a maximum height restriction.
The real motherboard can have a different module connector.

if you are doing a board anyway just put the FPGA on that


Not going to happen.

Please everyone.
I know what I plan to do and I am not going to explain why.

so you are firmly committed to a plan that involves a board you can't
find and might not even exist
Click to expand...

If we cannot find the module, then we will design it ourselves.
Right now, I prefer getting something which is as close
to our final solution as possible, but fits from a physical point of view.

AP

best of luck
Click to expand...
 
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