Are there any Modelsim hooks to allow testbench code to figu

A

Andrew FPGA

Guest
Hi,
We are using Modelsim Xilinx Edition III 6.0d. Throughout my testbench
I make calls to procedures that generate stimulus or check results.
Sometimes these procedures might detect an errror condition and I use

report "Warning: BusWrite() detected invalid bus state prior to writing
to the bus"

Then if this error or warning condition occurs modelsim prints the
following in the transcript window.

# ** Note: Warning: BusWrite() detected invalid bus state prior to
writing to the bus"
# Time: 508552 ns Iteration: 0 Instance:
/pcmrxinterfacetxframerhornettb

The problem is, I make calls to BusWrite() in lots of places in my
testbench. How can I figure out which one of those calls was the one
that caused the message to be printed?

Are there any modelsim hooks that would allow my testbench code to
figure out the call stack and/or where in the source the procedure got
called from. I could print this info along with my error message above.


Regards
Andrew
 

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