Are IO buffers required?

R

Rob Chavan

Guest
The Xilinx software gives me the option of using or not using the IO buffers for the actual pins in which input/outputs will be connected. <br><br>Does this mean that I can actually program the FPGA to not use the buffers? If so, would there be an increase in speed, since the buffer delay is no longer a problem? <br><br>Thanks...
 
Sorry Rob, the only way in and out is through the buffers. The option to
leave them out is for the case where you're making a block of logic which
will be used within another design. This sub-block would not want I/O
buffers because it's instantiated within a larger block.
Cheers, Syms.
"Rob Chavan" &lt;rob.chavan@nectx.com&gt; wrote in message
news:ee876a1.-1@webx.sUN8CHnE...
The Xilinx software gives me the option of using or not using the IO
buffers for the actual pins in which input/outputs will be connected.

Does this mean that I can actually program the FPGA to not use the
buffers? If so, would there be an increase in speed, since the buffer delay
is no longer a problem?
Thanks...
 

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