APEX fit problem

[Leszek]

Hi,
I have big problem to move my project (NIOS + some hardware) from
CYCLONE to APEX20K200. During fit, I have masg:
Error: Logic cell ref_16_system:inst|cpu:the_cpu|cpu_pipeline:the_cpu_pipeline|cpu_compact_alu:the_cpu_compact_alu|cpu_adder_logic_lock_region:the_cpu_adder_logic_lock_region|cpu_aluadder:the_cpu_aluadder|cpu_hidden_lcell_4CEF:carryout_reg|regout
requires 5 secondary signals of types non-global clock, non-global
clock enable, non-global clear, non-global synchronous clear, and
non-global synchronous load, but the selected device allows only 4
signals

Quartus HELP remarks, that I have to switch Auto Global Clock and
Signals "ON". I did it, but error still keep. What I can do?
Best regards
Leszek
leszekd@itam.zabrze.pl

 

[Jesse Kempa]

leszekd@itam.zabrze.pl (Leszek) wrote in message news:<9cc55753.0402130142.6096c572@posting.google.com>...

Hi,
I have big problem to move my project (NIOS + some hardware) from
CYCLONE to APEX20K200. During fit, I have masg:
Error: Logic cell ref_16_system:inst|cpu:the_cpu|cpu_pipeline:the_cpu_pipeline|cpu_compact_alu:the_cpu_compact_alu|cpu_adder_logic_lock_region:the_cpu_adder_logic_lock_region|cpu_aluadder:the_cpu_aluadder|cpu_hidden_lcell_4CEF:carryout_reg|regout
requires 5 secondary signals of types non-global clock, non-global
clock enable, non-global clear, non-global synchronous clear, and
non-global synchronous load, but the selected device allows only 4
signals

Quartus HELP remarks, that I have to switch Auto Global Clock and
Signals "ON". I did it, but error still keep. What I can do?
Best regards
Leszek
leszekd@itam.zabrze.pl

Leszek,

Have you re-generated your SOPC Builder system (Nios and all
peripherals) for the Apex family? There are several device
architecture-specific optimizations that go into the generated
VHDL/Verilog code depending on the device family you choose; many
Stratix and Cyclone features are not supported on Apex, and merely
changnig the device & pin assignments in Quartus won't address these.

Jesse Kempa
Altera Corp.
jkempa at altera dot com