Z
Zak
Guest
I have two designs that were done in old Xilinx Foundation Software - 1.5
(schematics can be opened in later versions and viewed). One design tests
the seven segment LEDS of a demo board and cycles through from 0 to 9 no
problems. The other design incorporates a timer but is giving scattered
segments on the seven segment display. As I am unable to open these files on
ISE I am hoping someone would like to take a quick look at the two files and
see if the basic schematics show any notable differences concerning the
seven segment problem. As the designs were made for the same board - and one
design works perfectly it may only be some pin assignment differences.
Please email me if interested - would be much appreciated.
Z
(schematics can be opened in later versions and viewed). One design tests
the seven segment LEDS of a demo board and cycles through from 0 to 9 no
problems. The other design incorporates a timer but is giving scattered
segments on the seven segment display. As I am unable to open these files on
ISE I am hoping someone would like to take a quick look at the two files and
see if the basic schematics show any notable differences concerning the
seven segment problem. As the designs were made for the same board - and one
design works perfectly it may only be some pin assignment differences.
Please email me if interested - would be much appreciated.
Z