any rule of thumb for product terms?

[RI]

Hi all,
I am a novice user, using free Linux tools and getting familiar with
cpld world for hobby purposes. I have some basic question about
product terms as follows.

I have rewritten my first project at least 5 times, but the process
was always stopped at the "fit" stage. Now it needs 553 terms, but
there is only 448, so I started to calculate. I have
8 bits wide D latch 1 piece
8 bits wide D , can switched to parallel-in, serial-out mode 1 piece
16 bits wide D , can switched to parallel-in, serial-out mode 1 piece
16 bits counter, can switched to parallel-in, serial-out mode 1 piece
17 bits counter 1 piece
2 bits counter 1 piece
There are 3 flag registers for internal use. It makes all together 70
D flipflops.

If I think of xc2c128 coolrunner with 128 cells, I'd expect adequate
product term for those 128 cells.
Are the product terms so scrimped? Or was is stupid to write all the
project in a single module? Maybe it causes troubles for the compiler
to optimize better? Should I better to split into parts, into simpler
modules?
Is there any rule or rules of thumb worth to strickly keep? I use
effectively both verilog compiler and simulator, but need some
introduction "to feel weights and lenghts" of cpld world.
Thanks in advance,
Istvan

 

[gabor]

On Feb 9, 11:31 am, RI <istvan.retal...@gmail.com> wrote:

Hi all,
I am a novice user, using free Linux tools and getting familiar with
cpld world for hobby purposes. I have some basic question about
product terms as follows.

I have rewritten my first project at least 5 times, but the process
was always stopped at the "fit" stage. Now it needs 553 terms, but
there is only 448, so I started to calculate. I have
8 bits wide D latch     1 piece
8 bits wide D , can switched to parallel-in, serial-out mode 1 piece
16 bits wide D , can switched to parallel-in, serial-out mode 1 piece
16 bits counter, can switched to parallel-in, serial-out mode 1 piece
17 bits counter     1 piece
2 bits counter     1 piece
There are 3 flag registers for internal use. It makes all together 70
D flipflops.

If I think of xc2c128 coolrunner with 128 cells, I'd expect adequate
product term for those 128 cells.
Are the product terms so scrimped? Or was is stupid to write all the
project in a single module? Maybe it causes troubles for the compiler
to  optimize better? Should I better to split into parts, into simpler
modules?
Is there any rule or rules of thumb worth to strickly keep? I use
effectively both verilog compiler and simulator, but need some
introduction "to feel weights and lenghts" of cpld world.
Thanks in advance,
Istvan

Hello Istvan,

I would suggest looking where the majority of the product
terms come from. For example a simple binary counter can
have as little as one product term per bit if the device
can use "T" flip-flops (most modern CPLD's can do this
just to make long counters possible). If you need to
make a counter using D flip-flops, you can reduce product
terms with a partial carry, otherwise each bit has one
more product term than the next lower bit.

I'm not sure what you mean by "16 bits counter, can
switched to parallel-in, serial-out mode", but this
sounds like a candidate for splitting into smaller
pieces to reduce terms. Since your part has excess
flip-flops, you may be able to put them to use to
reduce product terms, for example making a separate
counter and shift register. Usually synthesis tools
to a good job with things like counters and shift
registers, but produce a lot of logic when you try
to combine too many things together.

When you say free Linux tools, do you mean Xilinx
web pack? This should give you a detailed fitter
report.

Regards,
Gabor