any FPGA design for video frame memory control?

[Wang Feng]

Are there any reference designs for video frame memory control logic
to work with Philips SAA7111 decoder?

email to fwang11@pub3.fz.fj.cn

Thanks,

Wang, Feng

 

[Ray Andraka]

None that I am aware of, but it is not a difficult design to do. If
using SDRAM, you get the best performance by using fixed length bursts
(8 beat) and rotating the banks every 8 pixels to hide the precharge.

Wang Feng wrote:

Are there any reference designs for video frame memory control logic
to work with Philips SAA7111 decoder?

email to fwang11@pub3.fz.fj.cn

Thanks,

Wang, Feng

--
--Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930 Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com

"They that give up essential liberty to obtain a little
temporary safety deserve neither liberty nor safety."
-Benjamin Franklin, 1759

 

[Gerd B.]

I've got a cyclone design:
Video (SA7113) to LCD Converter ..

"Wang Feng" <fwang11@pub3.fz.fj.cn> schrieb im Newsbeitrag
news:bpn4lh$3oa$1@news.yaako.com...

Are there any reference designs for video frame memory control logic
to work with Philips SAA7111 decoder?

email to fwang11@pub3.fz.fj.cn

Thanks,

Wang, Feng