C
cargopatch
Guest
Hi
I'm playing around w/ a Xess XSA-50 board for a summer project.
I'd like to configure the onboard Xilinx Spartan fpga via the
prototyping header pins instead of the parallel port. I'm finding this
quite complicated so far, even after (because of) reading the tiny
section in the XSA documentation dedicated to programming w/ the
header pins; any advice on it from those more experienced?
The clocking sequence and configuration bitstream will be coming from
another Xilinx fpga that's being streamed the .bit configuration file
from a computer. I've already erased the CPLD on the XSA-50 so that it
doesn't interfere w/ the configuration but the Spartan doesn't even
seem to be acknowledging the process.
Thanks for reading
cargopatch@gmail.com
I'm playing around w/ a Xess XSA-50 board for a summer project.
I'd like to configure the onboard Xilinx Spartan fpga via the
prototyping header pins instead of the parallel port. I'm finding this
quite complicated so far, even after (because of) reading the tiny
section in the XSA documentation dedicated to programming w/ the
header pins; any advice on it from those more experienced?
The clocking sequence and configuration bitstream will be coming from
another Xilinx fpga that's being streamed the .bit configuration file
from a computer. I've already erased the CPLD on the XSA-50 so that it
doesn't interfere w/ the configuration but the Spartan doesn't even
seem to be acknowledging the process.
Thanks for reading
cargopatch@gmail.com