ANNC: Open Source, Free 32-bit soft processor webcast

B

bart

Guest
Lattice is holding a webcast tomorrow Wednesday, October 18, "Embedded
Design with LatticeMico32 Open, Free 32-bit Soft Processor." The
presenter will be Amr El-Shimi, from our IP marketing group.

If you're interested, the event takes place live at 11am Pacific, 18:00
GMT. In addition, you will be able to view this webcast archive
on-demand, at your convenience, starting a 24 hours after the live
event takes place.

You can register by clicking:
http://www.latticesemi.com/corporate/webcasts/embeddeddesignwithlattice/index.cfm

Bart Borosky, Lattice
 
In comp.arch.fpga bart <bart.borosky@latticesemi.com> wrote:
Lattice is holding a webcast tomorrow Wednesday, October 18, "Embedded
Design with LatticeMico32 Open, Free 32-bit Soft Processor." The
presenter will be Amr El-Shimi, from our IP marketing group.
Specificly what kind of license is used..?, and what are the terms?
Didn't find it at the site.

http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm

"HDL codes are available through a unique open IP core licensing agreement."
 
bart wrote:
Lattice is holding a webcast tomorrow Wednesday, October 18, "Embedded
Design with LatticeMico32 Open, Free 32-bit Soft Processor."
I couldn't turn-in, but I'd like to hear comments from people who did!
It sounds interesting.

Eric
 
pbdelete@spamnuke.ludd.luthdelete.se.invalid wrote:

Specificly what kind of license is used..?, and what are the terms?
For the LatticeMico32 there is an Open IP Core Licensing Agreement.
This license lets you freely mix proprietary with open code and freely
distribute hardware (FPGAs) without license documentation. This Open IP
Core Licensing Agreement applies to the generated microprocessor HDL
code and selected peripheral components HDL code.

Click here to see the license:
http://www.latticesemi.com/dynamic/view_document.cfm?document_id=21674

For the Development Tools (complier, assembler, linker and debugger)
there is a GNU - General Public License (GPL).

Hope this helps.
Regards,
Bart Borosky, Lattice
 
Eric wrote:
I couldn't turn-in, but I'd like to hear comments from people who did!
It sounds interesting.

Eric
Starting tomorrow you should be able to view the archive of the webcast
"on-demand" from the same link.
rgds,
bart
 
In comp.arch.fpga bart <bart.borosky@latticesemi.com> wrote:
pbdelete@spamnuke.ludd.luthdelete.se.invalid wrote:

Specificly what kind of license is used..?, and what are the terms?

For the LatticeMico32 there is an Open IP Core Licensing Agreement.
This license lets you freely mix proprietary with open code and freely
distribute hardware (FPGAs) without license documentation. This Open IP
Core Licensing Agreement applies to the generated microprocessor HDL
code and selected peripheral components HDL code.

Click here to see the license:
http://www.latticesemi.com/dynamic/view_document.cfm?document_id=21674
Could you release the document without login..?
 
"Eric" <englere_geo@yahoo.com> wrote in message
news:1161195789.664495.67840@m7g2000cwm.googlegroups.com...
bart wrote:
Lattice is holding a webcast tomorrow Wednesday, October 18, "Embedded
Design with LatticeMico32 Open, Free 32-bit Soft Processor."

I couldn't turn-in, but I'd like to hear comments from people who did!
It sounds interesting.
The webcast was a little dry. I'm not sure that it said anything new. The
estimated price is $0.80-$2.00 for the cpu part of the FPGA in large volumes
and depending on the FPGA and CPU options. I'm a relatively low-volume sort
so the numbers probably don't mean much for me. However, these sorts of
things are of interest because we have lots of messy I/O.

The do keep pushhing the point that the HDL is open source and not directly
tied to Lattice. You can take the code and synth for another vendor or ASIC.

Peter
 

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